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  2. Custom IC SKILL
  3. Stacked Vias

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Stacked Vias

Davadaroo Baba
Davadaroo Baba over 15 years ago

Hi,

I am interested to know if these's a way to create a stacked VIA, say a stack of VIA4 & VIA5 in a 6 metal process.

I am interested to know  how do I add this Stack VIA in the technology file? Can I add it to the tech file throught an API like the CreateStdVia & the CreateCustomVia? Or should I specify it in a constarain group entry(desired one),

I need Via4 & VIA5 placed one over the other.

 

Thanks in Advance.

 

Krish

 

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  • Davadaroo Baba
    Davadaroo Baba over 15 years ago

     Hi Andrew,

     

    This is the exact way I am following now.

    But I  am trying to  get  the following mechanism work :

    ( "Dummy_via_group"    nil
        interconnect(
         ( validLayers   (NW OD PO1 M1 M2 M3 M4 M6 .....  ) )
         ( validVias     ( M1__PO M2_M1 M3_M2 M4_M3 M5_M4 M6_M5 ))
        ) ;interconnect
      ) ;

    If I select the  following via group and create a wire,  when I move from M4 to up , it mus place  a stacked Via containing M5_M4_VIA & M6_M5_VIA

    What  changes do I do in the technology file if needed  to achieve this.

     

    Thanks

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  • Davadaroo Baba
    Davadaroo Baba over 15 years ago

     Hi Andrew,

     

    This is the exact way I am following now.

    But I  am trying to  get  the following mechanism work :

    ( "Dummy_via_group"    nil
        interconnect(
         ( validLayers   (NW OD PO1 M1 M2 M3 M4 M6 .....  ) )
         ( validVias     ( M1__PO M2_M1 M3_M2 M4_M3 M5_M4 M6_M5 ))
        ) ;interconnect
      ) ;

    If I select the  following via group and create a wire,  when I move from M4 to up , it mus place  a stacked Via containing M5_M4_VIA & M6_M5_VIA

    What  changes do I do in the technology file if needed  to achieve this.

     

    Thanks

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    • Vote Up 0 Vote Down
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