Stats

  • Locked Locked
  • Replies 10
  • Subscribers 143
  • Views 20310
  • Members are here 0
This discussion has been locked.
You can no longer post new replies to this discussion. If you have a question you can start a new discussion

Stop Simulation by Itself

gilberts

Is there a way to stop a simulation after a certain condition have been met? - ( VerilogA maybe? )

 

Example:

I setup a transient simulation to run for 50m secons.

The circuit oscillates for an unknown frequency, can be too high or too low.

In an alter, when the frequency is too high, the simulation time gets too long

and the results are not anymore necessary.

I only need to complete 20 cycles to analyze the results,

so I want to force stop/kill the simulation after completing 20 cycles on the output.

 

Thanks.

Gilbert

Parents
  • gilberts

    Andrew,

    Thank you very much.

     

    Best regards,

    Gilbert

Reply
  • gilberts

    Andrew,

    Thank you very much.

     

    Best regards,

    Gilbert

Children
No Data

Community Guidelines

The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.