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  3. create the multiple instance in parallel

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create the multiple instance in parallel

imagesensor123
imagesensor123 over 13 years ago
Hi all, i draw a sub-circuit, and i would like it to be a sybmol, so that i can implement it in the top level circuit, so my question is how can i create a multiple "self design symbol" in parallel but i don't want to draw them one by one, i notice that people can specify the "m=10" (multiple) parameters to achieve this when they want to use the ten capacitor connect in parallel, but i fould there is no "m" parameter when i use my own symbol, so what i can do for this? some guys said that we can specify the instance name[1:10] for this, but it doesn't work in cadence when i try to perform the simulation from ADE using the spectre simulator. welcome to your suggestion.
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  • ebecheto
    ebecheto over 13 years ago

    Try name<1:10>

     

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  • Andrew Beckett
    Andrew Beckett over 13 years ago

    You may also be able to add a user-defined property called "m" with the m-factor value you want on the instance. However, you need to ensure that all parts of the software you're using understand this. If using spectre, then that will netlist the m and will impact the simulation (this is more effecient than using the iterated instance name above, which results in a bigger matrix for the simulator to solve compared with m-factor which are natively handled by each device model, even when specified at higher levels in the hierarchy). For Layout XL, it can handle m-factor. For CDL netlisting (for LVS purposes) you may need to consult solution 11685698 .

    Regards,

    Andrew.

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  • mate0409
    mate0409 over 12 years ago

     Hello,

     is there any difference regarding simulation and layout between the notation: instance_name<0:3> and defining m=4 in the instance properties form?

    Thanks.

    Best Regards

     

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  • skillUser
    skillUser over 12 years ago

    First, please follow the guidelines and not append to a post that has had no traffic in over 6-months.

    Strictly speaking the iterated instance (e.g. I0<0:3>) represents separate devices connected in parallel, and the m-factor is a parameter passed to the simulator to model a single component as multiple devices connected in parallel, without adding further complexity to the netlist or simulation matrix (i.e. in this example 1 device with m=4 is a single device in the netlist but an instance with <0:3> in the name is 4 devices connected in parallel, yielding 4 devices in the netlist). When converting a schematic into a layout both should yield the same number of transistors, so in this regard they are the same, but for simulation I think that the m-factor approach reduces netlist and simulation complexity.

    Regards,

    Lawrence.

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  • Custom IC Desi
    Custom IC Desi over 12 years ago

     

    Hello if  M1<0:3> is used  ,  when  the device is picked from schematic  during layout  to connect the device in parallel , the LVS fails , i experienced it , instead  leave M1 as it is  change the multiplier to 4  , this worked 

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  • Andrew Beckett
    Andrew Beckett over 12 years ago

    I cannot think of any good reason for this - but quite frankly you've given virtually no information here. You don't say which tools you're using, which version, which LVS tool, etc etc.

    And you've appended an existing (old) thread, as has been advised against in the Forum Guidelines.

    Regards,

    Andrew

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