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create the multiple instance in parallel

imagesensor123
Hi all, i draw a sub-circuit, and i would like it to be a sybmol, so that i can implement it in the top level circuit, so my question is how can i create a multiple "self design symbol" in parallel but i don't want to draw them one by one, i notice that people can specify the "m=10" (multiple) parameters to achieve this when they want to use the ten capacitor connect in parallel, but i fould there is no "m" parameter when i use my own symbol, so what i can do for this? some guys said that we can specify the instance name[1:10] for this, but it doesn't work in cadence when i try to perform the simulation from ADE using the spectre simulator. welcome to your suggestion.
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  • First, please follow the guidelines and not append to a post that has had no traffic in over 6-months.

    Strictly speaking the iterated instance (e.g. I0<0:3>) represents separate devices connected in parallel, and the m-factor is a parameter passed to the simulator to model a single component as multiple devices connected in parallel, without adding further complexity to the netlist or simulation matrix (i.e. in this example 1 device with m=4 is a single device in the netlist but an instance with <0:3> in the name is 4 devices connected in parallel, yielding 4 devices in the netlist). When converting a schematic into a layout both should yield the same number of transistors, so in this regard they are the same, but for simulation I think that the m-factor approach reduces netlist and simulation complexity.

    Regards,

    Lawrence.

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  • First, please follow the guidelines and not append to a post that has had no traffic in over 6-months.

    Strictly speaking the iterated instance (e.g. I0<0:3>) represents separate devices connected in parallel, and the m-factor is a parameter passed to the simulator to model a single component as multiple devices connected in parallel, without adding further complexity to the netlist or simulation matrix (i.e. in this example 1 device with m=4 is a single device in the netlist but an instance with <0:3> in the name is 4 devices connected in parallel, yielding 4 devices in the netlist). When converting a schematic into a layout both should yield the same number of transistors, so in this regard they are the same, but for simulation I think that the m-factor approach reduces netlist and simulation complexity.

    Regards,

    Lawrence.

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