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Measuring Layout Geometry

rafaelon

Hello friends from Cadence,

I have a layout with 1M transistors. I would like to obtain some information from it.

For example, the width and length of a specific interconnection.

I don't want to use the ruler. How could I do it using Skill language or other way?

Thanks,

Rafael

Parents
  • Andrew Beckett

    Unknown said:
    We don't know very well how these tools work (Voltus-Fi, EAD and VPS), but we think that , for electromigration analysis , they calculate the current density from each line and compare with the maximum current density supported (obtained in the technology process datasheet). We are correct?

    Yes, that's correct. The EM rules often are supplied in an "ICT" file or QRC tech file, or even an emData file (various formats), and that's what these tools use.

    I don't know of anything we have that looks at stressmigration. I was not aware of it being a significant issue in most technologies (that may just be my lack of knowledge, but I don't think I've ever had anyone ask me about it).

    Regards,

    Andrew.

Reply
  • Andrew Beckett

    Unknown said:
    We don't know very well how these tools work (Voltus-Fi, EAD and VPS), but we think that , for electromigration analysis , they calculate the current density from each line and compare with the maximum current density supported (obtained in the technology process datasheet). We are correct?

    Yes, that's correct. The EM rules often are supplied in an "ICT" file or QRC tech file, or even an emData file (various formats), and that's what these tools use.

    I don't know of anything we have that looks at stressmigration. I was not aware of it being a significant issue in most technologies (that may just be my lack of knowledge, but I don't think I've ever had anyone ask me about it).

    Regards,

    Andrew.

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