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How can design variables be taken into account for optimization in ADE GXL?

stephbur

In the ADE GXL I can define parameter ranges for transistor parameters such as length, width, number of fingers etc.

What I failed to find, is how I can also make the optimizer vary DC voltages (such as cascode bias voltages for instance).

According to an 8 year old question (https://community.cadence.com/cadence_technology_forums/f/custom-ic-skill/22673/optimization-in-ade-gxl) this should  be possible, but it is not described how it can be achieved.

How can design variables be taken into account for optimization in ADE GXL?

  • Andrew Beckett

    You can optimise global variables - all you need to do is set them up with a sweep range (as you are doing for circuit parameters, but in the global variables section), and then the optimiser will optimise over those too.

    So nothing particularly special needed...

    Andrew.

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