Stats

Locked Locked
Replies 11
Subscribers 144
Views 3526
Members are here 0

This discussion has been locked.

You can no longer post new replies to this discussion. If you have a question you can start a new discussion

automatic Router using to route shortest path between two pin (IN virtuoso studio IC23.1) it is using in layout XL

KR20250126941 7 months ago

Hi to all, hope you all are fine and doing well

i am trying to use virtuoso auto route along with wire assistant to route between two pins, the problem is it is not following Metal orientations while routing and creating drc issues so plz help me to resolve this issuese

RobMan 7 months ago

Set the 'Wrong Way Tax' to 'None' in the Wire Assistant....
Cancel
Vote Up 0 Vote Down

Cancel
RobMan 7 months ago

Hi,
Cancel
Vote Up 0 Vote Down

Cancel
RobMan 7 months ago

Hi,
Cancel
Vote Up 0 Vote Down

Cancel
KR20250126941 7 months ago in reply to RobMan

hi
Cancel
Vote Up 0 Vote Down

Cancel
KR20250126941 7 months ago in reply to KR20250126941

Thanks for your reply RobMan sir,

The wrong way tax option is working for metals, but it is not working for vias , i tried using multiple option in via section but not working,

it is working for metal with width 0.064 and not working for widths 0.08 or more

i am attaching some pics in the below drive hope you will go through it and reply and help me to resolve this issue.

DRIVE LINK:

https://drive.google.com/drive/folders/1hhHI2Pw52_Q7HkwNZTzeLu02XJ_7a99d?usp=drive_link
Cancel
Vote Up 0 Vote Down

Cancel
RobMan 7 months ago in reply to KR20250126941

Unfortunately the drive link you sent was blocked... probably our internal security.

Also apologies for the "Hi" messages. The landing page from message sent a reply on <return>!

Which foundry PDK are you using?
Cancel
Vote Up 0 Vote Down

Cancel
SR202501288723 7 months ago in reply to RobMan

Hello sir my account was blocked I am replying from my friends account

We working in the GF 14 nm

The vias was not following the orientation and

When there is a full congestion the auto route was doing shorts and

To do compact and shortest routing using the tool please suggest us the options has to be enabled and env variable has to be set

Please answer to these 3 questions which helps us to resolve our problems

Thank you
Cancel
Vote Up 0 Vote Down

Cancel
KR20250126941 7 months ago in reply to RobMan

Okey sir, sorry for late reply actually my reply option disabled for some time.

We are working in the GF 14nm

The orientation was not following for the vias and

When there is a full congestion in the routing the auto route was doing shorts and

To have a compact and shortest routing using auto route option what option we have to change and what env variable we have to set

Will you Please answer the above 3 questions to resolve my issues

Thank you
Cancel
Vote Up 0 Vote Down

Cancel
RobMan 7 months ago in reply to KR20250126941

For advanced node be sure to use Layout MXL routing assistant.

Consider the APR flow.

Define WSPs for routing (APR flow can assist with this).

Is it device, standard cell or chip assembly routing?
Cancel
Vote Up 0 Vote Down

Cancel
SR202501288723 7 months ago in reply to RobMan

Sir we don't have licence for MXL right now

So we are doing it in Layout XL using wire assistance

Can you help us to suggest some more options and env variable for better routing and shortest routing

We doing it for block level routing for analog
Cancel
Vote Up +1 Vote Down

Cancel

Community Guidelines

The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.