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  3. Can SRoute route to the line shape pin of Vdd and GND?

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Can SRoute route to the line shape pin of Vdd and GND?

Renee
Renee over 17 years ago

In my own cell library, the IO and power/ground ports are all the line labels. I prefer that in the lef file, they are also line label pins. For the signal pins, it works fine by assigning them as line shape pin, but for the power/ground pins, if they are assigned as line shape pins, the SRoute did not route at all and the Vdd and GND are open nets. Even if I change only one cell's power and ground pins to square pins that the SRoute will route normally. But I cannot explain why does it act like that?

 In the soce user guide, it only said that "it connect power and ground nets from end-to-end, terminating at the power rings."

I checked the solutions for open nets in soce user guide, it suggested that it might be problems with pins that have hot physical geometry, which I think the line label pin is of this kind. But if it is the problem, then, why does it route correctly with IO line label pins and also with power/ground pins even if there is only one cell containing square power/ground pins?

Can anyone explain the action of SRoute when routing power and ground nets?

Thank you very much!

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  • Kari
    Kari over 17 years ago

    Hi Renee,

    I'm not familiar with "line label pins". Could you post a picture?

     Thanks,

     - Kari

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  • Renee
    Renee over 17 years ago

    The attached file is a magic file of nand2 gate. It can be seen that all the labels are shown as yellow line. That is line labels. So when magic file is converted into lef file, these line labels are attached with the keyword PIN, so I call them "line label pin".

    It is strange that when I do sroute, it reported that these pins have no physical geometry, and it first gave a info that "The viaGen is rebuilding shadow vias for net Vdd! and GND!", and then it did not route the power and ground nets if all the cells use these "line label pins", and finally gave warning "viaGen found no shadow vias to rebuild for net Vdd! and GND!".

     However, but if there is at least one cell with sized power and ground pins, it indeed route normally.

    I don't want shadow vias rebuilt. But I cannnot find information on how to remove this setting.

     

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  • Kari
    Kari over 17 years ago

     Hi Renee,

     I would not recommend using LEFs that have pins with no physical geometry. Maybe there is a switch in your LEF generator to have the pins generated as actual shapes?

    - Kari 

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