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Pin access violation

Ying over 16 years ago

When I run post-route optimization, a error "pin access violation" is reported, How can I do?

Kari over 16 years ago

Hi Ying,
Does the message tell you which cell/pin is violating? Just offhand, it sounds like maybe you have some std cell pins stuck under a power bus or something like that.
- Kari
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Whiteman over 6 years ago in reply to Kari

Have the same problem. Is there any directive to place_opt_design avoid placement under power grid?
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Dimo M over 5 years ago in reply to Whiteman

You can apply PG keep-outs on the pins of base cells using the specify_pg_keepout command. You can find further details and an example here: support.cadence.com/.../ArticleAttachmentPortal
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