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connectivity check after p&R

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Hi;
Thank you for the help.
Since this is my first time to use encounter, I have many problems.
When I am done with P&R and did connectivity check, I have connection problems with vdd and vss.
I have already done the following.

sroute -nets {vdd vss}

but still have this problem.
Can I check if this is a real problem?
If so, how can I solve this problem?

Thank you so much


Originally posted in cdnusers.org by semicond
Parents

  • 1. Hi; I checked out ERC rule. pwr/grd seems to be ok. There are some error reprots about NTAP and PTAP. I think this is all about the guardring. In addition, the lvs discrepancies are happening in some standard cells but not in other cells. But, when I took out the standard cells and did lvs only for the cells, there is no discrepancy. That's why I am so confusing.

    2. Hi mohan;
    encounter version : v04.10-s219-1
    technology : umc 130nm
    I think the lvs error is not about the power or ground. There are some extra ports in layout. But, when I looked into the ERC reports, there are no short connection. In addition, when I did lvs only about the standard cell, there is no discrepancy at all. Mentor is saying that there must be some connectivity problems in top level.
    Based on the encounter connectivity check, only vss and vdd terminals seem to be unconnected. There are no connectivity problems.

    I checked lvs options and ports. I think there is no problem.

    Mohan : Do you think it is possible that encounter could make a wrong layout connections which can be different from the netlist that it generates?


    Originally posted in cdnusers.org by semicond
Reply

  • 1. Hi; I checked out ERC rule. pwr/grd seems to be ok. There are some error reprots about NTAP and PTAP. I think this is all about the guardring. In addition, the lvs discrepancies are happening in some standard cells but not in other cells. But, when I took out the standard cells and did lvs only for the cells, there is no discrepancy. That's why I am so confusing.

    2. Hi mohan;
    encounter version : v04.10-s219-1
    technology : umc 130nm
    I think the lvs error is not about the power or ground. There are some extra ports in layout. But, when I looked into the ERC reports, there are no short connection. In addition, when I did lvs only about the standard cell, there is no discrepancy at all. Mentor is saying that there must be some connectivity problems in top level.
    Based on the encounter connectivity check, only vss and vdd terminals seem to be unconnected. There are no connectivity problems.

    I checked lvs options and ports. I think there is no problem.

    Mohan : Do you think it is possible that encounter could make a wrong layout connections which can be different from the netlist that it generates?


    Originally posted in cdnusers.org by semicond
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