Nanoroute crashes

I am a student of Technical University of Crete trying to finish a project. My goal is to make a simple chip implementing an algorithm. For this purpose I used RTL Compiler to synthesize my VHDL code and then I used SOCE 6.2 with updates for place and route. The target technology is a Faraday/UMC 90nm standard performace process. Everything seems to be fine until I try to have Nanoroute route my design. It is a small design of approximately 94000 std cell instances. When I route the core alone without adding pads, everything is ok. But when I load the netlist with the pads and try the global detail routing with nanoroute i get this message:

 #WARNING (NRIG-39)  Pin clk doesn't have physical shapes !
#WARNING (NRIG-39)  Pin reset doesn't have physical shapes !
#WARNING (NRIG-39)  Pin input[31] doesn't have physical shapes !
#WARNING (NRIG-39)  Pin input[30] doesn't have physical shapes !
#WARNING (NRIG-39)  Pin input[29] doesn't have physical shapes !
#WARNING (NRIG-39)  Pin input[28] doesn't have physical shapes !
#WARNING (NRIG-39)  Pin input[27] doesn't have physical shapes !
#WARNING (NRIG-39)  Pin input[26] doesn't have physical shapes !
#WARNING (NRIG-39)  Pin input[25] doesn't have physical shapes !
#WARNING (NRIG-39)  Pin input[24] doesn't have physical shapes !
#WARNING (NRIG-39)  Pin input[23] doesn't have physical shapes !
#WARNING (NRIG-39)  Pin input[22] doesn't have physical shapes !
#WARNING (NRIG-39)  Pin input[21] doesn't have physical shapes !
#WARNING (NRIG-39)  Pin input[20] doesn't have physical shapes !
#WARNING (NRIG-39)  Pin input[19] doesn't have physical shapes !
#WARNING (NRIG-39)  Pin input[18] doesn't have physical shapes !
#WARNING (NRIG-39)  Pin input[17] doesn't have physical shapes !
#WARNING (NRIG-39)  Pin input[16] doesn't have physical shapes !
#WARNING (NRIG-39)  Pin input[15] doesn't have physical shapes !
#WARNING (NRIG-39 Repeated 20 times. Will be suppressed.)  Pin input[14] doesn't have physical shapes !
#Start reading timing information from file .timing_file.tif ...
#
#The worst setup slack read in is -3.446
#
#No hold time constraints read in
#Read in timing information for 105 ports, 94412 instances.
#NanoRoute Version v06.20-s090 NR070717-1629/USR50-UB
#Checked out 1 Multithread_Route_Option license.
#LM Super/Multi-Thread mode: LM use 2 threads
#Using S.M.A.R.T. routing technology.
#
#Start data preparation...
#WARNING (NREX-28) The height of the first routing layer metal1 is 0.000000. It should be larger than 0.000000
#WARNING (NREX-30) Please also check the height and metal thickness values for the routing layers heigher than routing layer metal1
Encounter terminated by internal (SEGV) error/signal...
*** Stack trace in log file.
Hangup

Does anyone know what could be the cause of this??

I load first the three lefs of core cells (header+macro+ant) with this order, then a memory lef and finally three IO lefs(header+macro+ant).

Thanks in advance!