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Stack via on spare gates' pins

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Hi layout-ers!

Need your advise on implementing an requirement for spare gate.

I need to put some spare gates in the design; I can do this, and place it well.

However, there is a requirement that the pins of the spare gates (input and output) should have a stacked via on top of its an all the way to the top metal. This is to increase the chance of changing less metal layers when eco is using the spare gates.

So, I need to

1. Do not place the spare gate under power stripes (if not the stacked via will short to the power (input pins are connected to tie-high/tie-low)
2. find a way to add the stacked via on the pins (and even better the gloabl router is able to optimise the routing for congestion with the existance of these stacked via)

One easier way is to create standard cell with those pins; but unfortantely  the standard cell library I am using does not have these features, and I do not wish to create new cells with the stacked pins...

Anyone done this before and know the correct way to do this in SOC? Thanks.

Regards,
Eng Han


Originally posted in cdnusers.org by EngHan
Parents

  • Hello Eng Han ,

    Please find if this can help you out .
    In your mail you told that your spare gates are placed well !! ( you mean legalisation of placement ?? )

    In my understanding you have created the placement restrictions for spare cells . ( am i right ?? ) .
    if the spare cells have no placement restriction , they are scattered on the whole design ( row -core area ) , at the time of cell placement.
    When you want to place spare cells in the specific are , give placement restrictions ( to create regions & groups ) .
    for creating group for spare cell use "createInstGroup" cmd.
    to add spare cells to that group created use "addInstToInstGroup" cmd.
    for creating a region for the group use "createRegion"
    (ex. createRegion SPAREGROUP_case1 sx sy lx ly )

    During Place cells ( placement setup for logical cells )
    Specify the layer to treat as placement obstruction area under power routing
    setPrerouteAsObs { layers} .
    as placement engine eastimates timing routing congestion based on trialRoute result use "setTrailRouteMode" options ,
    like min/max RoutingLayers .

    finally before spare cell placement define spare cells by using "specifySpareGate -inst " cmd.
    go ahead with placement .

    for place cell which ware added by ECO use "ecoPlace -useSpareCells " option .

    Hope this will help to some extent .

    good luck !!


    Originally posted in cdnusers.org by mohanch007
Reply

  • Hello Eng Han ,

    Please find if this can help you out .
    In your mail you told that your spare gates are placed well !! ( you mean legalisation of placement ?? )

    In my understanding you have created the placement restrictions for spare cells . ( am i right ?? ) .
    if the spare cells have no placement restriction , they are scattered on the whole design ( row -core area ) , at the time of cell placement.
    When you want to place spare cells in the specific are , give placement restrictions ( to create regions & groups ) .
    for creating group for spare cell use "createInstGroup" cmd.
    to add spare cells to that group created use "addInstToInstGroup" cmd.
    for creating a region for the group use "createRegion"
    (ex. createRegion SPAREGROUP_case1 sx sy lx ly )

    During Place cells ( placement setup for logical cells )
    Specify the layer to treat as placement obstruction area under power routing
    setPrerouteAsObs { layers} .
    as placement engine eastimates timing routing congestion based on trialRoute result use "setTrailRouteMode" options ,
    like min/max RoutingLayers .

    finally before spare cell placement define spare cells by using "specifySpareGate -inst " cmd.
    go ahead with placement .

    for place cell which ware added by ECO use "ecoPlace -useSpareCells " option .

    Hope this will help to some extent .

    good luck !!


    Originally posted in cdnusers.org by mohanch007
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