Stack via on spare gates' pins

Hi layout-ers!

Need your advise on implementing an requirement for spare gate.

I need to put some spare gates in the design; I can do this, and place it well.

However, there is a requirement that the pins of the spare gates (input and output) should have a stacked via on top of its an all the way to the top metal. This is to increase the chance of changing less metal layers when eco is using the spare gates.

So, I need to

1. Do not place the spare gate under power stripes (if not the stacked via will short to the power (input pins are connected to tie-high/tie-low)
2. find a way to add the stacked via on the pins (and even better the gloabl router is able to optimise the routing for congestion with the existance of these stacked via)

One easier way is to create standard cell with those pins; but unfortantely  the standard cell library I am using does not have these features, and I do not wish to create new cells with the stacked pins...

Anyone done this before and know the correct way to do this in SOC? Thanks.

Regards,
Eng Han