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Controlling logic names of CTS inserted buffers.

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Hello,
I was wondering if there is a way to tailor the instance names of buffers inserted by CTS?  Specifically, what I am trying to do is control where in the logic hierarchy the clock buffers are placed.  I would like any buffers inserted by Encounter to be logically placed inside a specific module in the hierarchy.  This allows for easier import back into the Cadence DFII world after Encounter place and route step.

Anyone had any sucess with this?


Originally posted in cdnusers.org by nph
Parents

  • Thanks Bob,
    A little more info on what I want to accomplish.
    I'm bringing in a top level Verilog netlist of the design.  This file contains a "digital" module and instatiations for all the pad cells at the top level.  I would like to specify my "AutoCTSRootPin" at the pin clock of the pad cell that is logically in the top level.  However when I do this, Encounter places clock buffers in the top level hierarchy.  I would like to have these buffers placed logically in the "digital" module. 
    So from your post I think I need to create a partition of the "digital" module and use the pushBufferdown command to move any buffers inserted in the top level into the "digital" partition.?.

    However when I try to define the partition from the command line, and gui I get the following message.
    "**WARN: (SOCPTN-406):   Ignoring partition dig_top: Cannot create a partition without any constraint."
    Here is the command I am using.

    definePartition -hinst digital -coreSpacing 1 1 1 1 -railWidth 1 -minPitchLeft 2 -minPitchRight 2 -minPitchTop 2 -minPitchBottom 2 -reservedLayer { 1 2 3} -pinLayerTop { 2} -pinLayerLeft { 3} -pinLayerBottom { 2} -pinLayerRight { 3} -placementHalo 1 1 1 1 -routingHalo 1 -routingHaloTopLayer 3 -routingHaloBottomLayer 1

    Any thoughts?


    Originally posted in cdnusers.org by nph
Reply

  • Thanks Bob,
    A little more info on what I want to accomplish.
    I'm bringing in a top level Verilog netlist of the design.  This file contains a "digital" module and instatiations for all the pad cells at the top level.  I would like to specify my "AutoCTSRootPin" at the pin clock of the pad cell that is logically in the top level.  However when I do this, Encounter places clock buffers in the top level hierarchy.  I would like to have these buffers placed logically in the "digital" module. 
    So from your post I think I need to create a partition of the "digital" module and use the pushBufferdown command to move any buffers inserted in the top level into the "digital" partition.?.

    However when I try to define the partition from the command line, and gui I get the following message.
    "**WARN: (SOCPTN-406):   Ignoring partition dig_top: Cannot create a partition without any constraint."
    Here is the command I am using.

    definePartition -hinst digital -coreSpacing 1 1 1 1 -railWidth 1 -minPitchLeft 2 -minPitchRight 2 -minPitchTop 2 -minPitchBottom 2 -reservedLayer { 1 2 3} -pinLayerTop { 2} -pinLayerLeft { 3} -pinLayerBottom { 2} -pinLayerRight { 3} -placementHalo 1 1 1 1 -routingHalo 1 -routingHaloTopLayer 3 -routingHaloBottomLayer 1

    Any thoughts?


    Originally posted in cdnusers.org by nph
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