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  3. Controlling logic names of CTS inserted buffers.

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Controlling logic names of CTS inserted buffers.

archive
archive over 18 years ago

Hello,
I was wondering if there is a way to tailor the instance names of buffers inserted by CTS?  Specifically, what I am trying to do is control where in the logic hierarchy the clock buffers are placed.  I would like any buffers inserted by Encounter to be logically placed inside a specific module in the hierarchy.  This allows for easier import back into the Cadence DFII world after Encounter place and route step.

Anyone had any sucess with this?


Originally posted in cdnusers.org by nph
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  • archive
    archive over 18 years ago

    Posted By nph on 2/09/2007 2:06 PM
    Thanks for all the help!
    I am now able to allow Encounter to insert buffers into the top level of my design and have them inserted logically into a module I specify.  Although it's not the "cleanest" method it works.  This method works buffering clock pins at the top level, and also general purpose pins that drive out of a module, and still allows the buffers to logically be inserted in the specified module.

    Here is the flow I'm using, feel free to make recomendations for improvements...

    Before CTS I use the following commands.

    ###Fence constraint created for module I want all inserted buffers to be placed in.
    createFence "module_name" 0 0 100000 100000

    ###CTS option to instruct CTS to not create extra ports for any fences defined.  This allows for ###specifying a clock pin as "AutoCTSRootPin" and not have CTS create an extra port.
    setCTSMode -fence

    ###Create partition of module in order to logically put inserted buffers into module given.
    definePartition -hinst "module_name"

    ###Any buffers residing in partition that have been inserted logically into a different ###module are "pushed" into module specified.  UseExistingPort will attempt not create new ###ports.
    pushdownBuffer -ptn "module_name" -useExistingPort true


    I had to use the "CTSMode -fence" because giving "AutoCTSRootPin" a clock pin in the top level was causing CTS to create new ports into the "digital" module, which was undesired. 
    I also had to add a "refinePlace" command after CTS in order to fix some cell overlaps that occur between buffers inserted by CTS and regular standard cells.  Not entirely sure why CTS is not fixing these overlaps.?..

    Thanks again for your help.





    Originally posted in cdnusers.org by nph
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  • archive
    archive over 18 years ago

    Posted By nph on 2/09/2007 2:06 PM
    Thanks for all the help!
    I am now able to allow Encounter to insert buffers into the top level of my design and have them inserted logically into a module I specify.  Although it's not the "cleanest" method it works.  This method works buffering clock pins at the top level, and also general purpose pins that drive out of a module, and still allows the buffers to logically be inserted in the specified module.

    Here is the flow I'm using, feel free to make recomendations for improvements...

    Before CTS I use the following commands.

    ###Fence constraint created for module I want all inserted buffers to be placed in.
    createFence "module_name" 0 0 100000 100000

    ###CTS option to instruct CTS to not create extra ports for any fences defined.  This allows for ###specifying a clock pin as "AutoCTSRootPin" and not have CTS create an extra port.
    setCTSMode -fence

    ###Create partition of module in order to logically put inserted buffers into module given.
    definePartition -hinst "module_name"

    ###Any buffers residing in partition that have been inserted logically into a different ###module are "pushed" into module specified.  UseExistingPort will attempt not create new ###ports.
    pushdownBuffer -ptn "module_name" -useExistingPort true


    I had to use the "CTSMode -fence" because giving "AutoCTSRootPin" a clock pin in the top level was causing CTS to create new ports into the "digital" module, which was undesired. 
    I also had to add a "refinePlace" command after CTS in order to fix some cell overlaps that occur between buffers inserted by CTS and regular standard cells.  Not entirely sure why CTS is not fixing these overlaps.?..

    Thanks again for your help.





    Originally posted in cdnusers.org by nph
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