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  3. ELC(Encounter Library Characterization)(Ex-Signalstorm)...

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ELC(Encounter Library Characterization)(Ex-Signalstorm) isues

Haris1
Haris1 over 16 years ago
 Dear all,

I am using ELC (Encounter Library Characterization )(Ex- Signalstorm) software provided by Cadence, but there are some issues, which I would like to discuss with you.

1)  Can ELC be used to characterize cells which are not primitive (have other cells in them)?

I have tried to characterize a cell consisting of cascaded inverters. ELC (SignalStorm) characterized the inverter as a “cell” while the overall structure is described as a “block”. For some reason the tool calculates the delays for the inverter and not for the overall digital block. I have tried , according to the ELC manual,  to use the “EXPAND” command  in the elccfg file, when characterizing hierarchical blocks, but nothing happened (the tool although it recognizes the hierarchical block it performs simulations for the inverter only, not for the whole block) . I noticed that when I built the same structure in a “flat” form (The final block was built with transistors, without using hierarchical structure) the characterization was performed easily.

 2) The characterization of a cell does not result to the same delays as these output by spectre. through the digital cells. (We compared the simulation results of the av_extracted cell with the simulation results of the verilog cell generated by the SignalStrom tool. For both simulations we used the AMS simulator). The combination of the values of the slew rate and the capacitive load specified in the “setup” file strongly affect the simulation results. Why?

3) Are parameters like “Vtn” and “Vtp” specified in the “setup” file necessary?  (because this information is contained in the model files needed for the ELC (SignalStorm) simulations.)
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  • admin
    admin over 16 years ago

    About the second question:

    The verilog generated is just a model with a delay for unitary simulation, the delay must be provided for a .sdf file.  The propagation the delay

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  • vermut
    vermut over 14 years ago
    I have similar question about Vtp and Vtn paremeters in setup file: first of all this parameters contains in model file and if I change it in setup file - output *.lib file doesn't change. Is Vtp/Vtn treshold voltage Pmos and Nmos or not?
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