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Hard macros power routing issues

dbekiaris

Hello everybody,

 I import a design in SoC Encounter 7.1, where three hard macros (SRAMs) exist. The problem is that when I am trying to create the power stripes and connect them with the core rings to synthesize the power grid, the SRAM p/g pins cannot connect with the remaining power/ground network, although I have selected the proper metal layer from the .lef files of the macros. Is there anything possible to do for this? I tried also to align pins of the specified macros with the power/ground stripes, but it failed again. If it is possible, please help. Thank you very much in advance.

 

Parents

  • Hi Kari,

    Thanks for answering and for the support. However, the problem is much more serious that I could imagine, except if I make wrong steps. The opens are shown at the left side of the macro boxes. So, as far as the rings cannot connect to the pins at these areas, the VDD/VSS pins stay unconnected. Therefore, I suppose the pin assignment of the macro blocks should change. Is this possible in SoC Encounter ? Can I create a partition and reassign the pins to the left top or to the bottom of the macro? Or the problem is not that ? Anyway, if you have any answer of idea on these questions, please help. Thank you very very much again in advance.

     Kind Regards

     

Reply

  • Hi Kari,

    Thanks for answering and for the support. However, the problem is much more serious that I could imagine, except if I make wrong steps. The opens are shown at the left side of the macro boxes. So, as far as the rings cannot connect to the pins at these areas, the VDD/VSS pins stay unconnected. Therefore, I suppose the pin assignment of the macro blocks should change. Is this possible in SoC Encounter ? Can I create a partition and reassign the pins to the left top or to the bottom of the macro? Or the problem is not that ? Anyway, if you have any answer of idea on these questions, please help. Thank you very very much again in advance.

     Kind Regards

     

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