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CTS with MMMC

SINGI

HI

 

I am working with 40nm TSMC library, according to adavanced chip implementation tech., CTS needs the following:

Clock routing with 2X width and 2X spacing.

Include double Via and clock sheilding.

 I cld succussfullly  get 2X spacing, and shielding but have prbs with 2X width and vias.  According to cadence soc encounter manual, I can use NONDEFAULTRULE to  CTS 2 use wide wires and for this I need to put in the lef files, the 2X width. But wen i try to run CTS, i have the following errors and tools crashes.(i use setCTSMode -routeNonDefaultRule widenwires)

 


globalDetailRoute

#Start globalDetailRoute on Thu Aug 13 15:19:22 2009
#
#cpu time = 00:00:00, elapsed time = 00:00:00, memory = 1942.00 (Mb)
#WARNING (NRDB-411) spacing table for LAYER M1 is already defined. Ignore this one.
#WARNING (NRFL-333) line 106: edge checked min area rule already exists. Cannot overwrite it with a new one. Ignore the new one.
#WARNING (NRDB-411) spacing table for LAYER M2 is already defined. Ignore this one.
#WARNING (NRFL-333) line 192: edge checked min area rule already exists. Cannot overwrite it with a new one. Ignore the new one.
#WARNING (NRDB-411) spacing table for LAYER M3 is already defined. Ignore this one.
#WARNING (NRFL-333) line 277: edge checked min area rule already exists. Cannot overwrite it with a new one. Ignore the new one.
#WARNING (NRDB-411) spacing table for LAYER M4 is already defined. Ignore this one.
#WARNING (NRFL-333) line 362: edge checked min area rule already exists. Cannot overwrite it with a new one. Ignore the new one.

 

please let me know solution.

 Thank you 

 Sing 

Parents

  • Hi Kari

    Thanks a lot for the reply. I have no probs with LEF(followed ur reply) . After routing I can see in the layout many of the clock nets are routed with Shielding, but not all the clock nets, I think its because there are no  neighbouring nets for XTalk effect so only the nets with possible Xtalk are shielded with VSS.

    most of my problems are solved now. I wll come back if thre are any moer.

     

     

    Sing 

     

Reply

  • Hi Kari

    Thanks a lot for the reply. I have no probs with LEF(followed ur reply) . After routing I can see in the layout many of the clock nets are routed with Shielding, but not all the clock nets, I think its because there are no  neighbouring nets for XTalk effect so only the nets with possible Xtalk are shielded with VSS.

    most of my problems are solved now. I wll come back if thre are any moer.

     

     

    Sing 

     

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