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DRC violation

surajece01

Hi All,

The Nano has routed the tie-Hi and tie-Low pins of cells to vdd and vss in such a way that the via is not formed on the routing grid because of which there are some DRC violations which encounter couldnot catch in verify geometry and calibre identified it.we deleted all the  VDD and VSS nets and given a option of "routeviaonroutegrid true" in nano, it tried in few places but again caused spacing violations. can somebody show some light on this. 

Then when we try to connect manually Tie Low pin of cell by dragging wire in MET2 back and connect to the follow pin (Met1), it is creating a regular vss net in met1 which we didnot have earlier,now we have a followpin and a regular net in met1 at the same place. I think iam doing a mistake in setting proper options for edit wire.

 

can somebody help me on this.

Regards

suraj 

 

 

Parents

  •  Hi Suraj,

    When you route tiehi/lo nets directly to the grid, it's normal for the power grid part of the metal to be a specialnet, and the tiehi/lo part to be a regular net. If I understand correctly what you're doing, then I don't think you're doing anything wrong. However, you would of course like Nanoroute to make these connections in a DRC-clean way instead of routing by hand.

    The key may be to figure out why Nanoroute and Verify Geometry did not see the violations that Calibre saw. Maybe the LEFs are missing some blockage information, for example. Check out the following nanoroute variables and see if they make a difference in getting a DRC-clean connection:

    setNanoRouteMode routeAllowPowerGroundPin
    setNanoRouteMode routeStripeLayerRange

    - Kari

Reply

  •  Hi Suraj,

    When you route tiehi/lo nets directly to the grid, it's normal for the power grid part of the metal to be a specialnet, and the tiehi/lo part to be a regular net. If I understand correctly what you're doing, then I don't think you're doing anything wrong. However, you would of course like Nanoroute to make these connections in a DRC-clean way instead of routing by hand.

    The key may be to figure out why Nanoroute and Verify Geometry did not see the violations that Calibre saw. Maybe the LEFs are missing some blockage information, for example. Check out the following nanoroute variables and see if they make a difference in getting a DRC-clean connection:

    setNanoRouteMode routeAllowPowerGroundPin
    setNanoRouteMode routeStripeLayerRange

    - Kari

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