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Encounter "short" violations

[Repost from IC design forum] hi, I have some "short" errors on my VDD and GND rails when I check for "verify geometry" using encounter for PAR. The macro cells's GND and VDD are placed 'right' on the designated GND and VDD rails and still the tool somehow doesnt match it with the cells GND/VDD and it shows short violations on every damn cell for GND and VDD!..any sort of help will be greatly appreciated. Here is the exact error message from encounter: "special wire of NET GND & blockage of cell g170" thanks

Kari over 15 years ago

Hopefully you can get the issues cleared up, get abstract working, and make your job easier! I think abstract questions would go in the "Custom IC Design" forum.
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