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Which software to use?

theASICdude
hi all, A little confused here about all the available software out there. I need a software where I can design my circuit using verilog (RTL, behavioral) and then compile it (perhaps creating a netlist). Then be able to design a test bench and test out my circuit. My end product would be to get a GDSII file of my design. Would SoC encounter do all this? Thank you.

  • Hi ASICdude:

    You would definitely want to use SoC Encounter to take your design from netlist to GDSII.

    Besides SoCE, you would want to use RTL Compiler to compile your design and create your netlist, and (depending on the complexity of your design) Incisive Enterprise Simulator and Manager to develop your testbench and verify your design.

    You can find more details in the Products & Solutions section of the Cadence webpage.

    http://www.cadence.com/products/pages/default.aspx

    Good luck with your design!

    Steve.

  • SoCE would enable you take your netlist to GDSII.

    To compile your netlist from RTL, you would need to use RTL Compiler.

    To design your testbench and test/verify your circuit, you would need to use Incisive Enterprise Simulator.

     Hope that helps...good luck with your design!

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