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  3. ELC doesn't simulate anything

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ELC doesn't simulate anything

mbhealy
mbhealy over 15 years ago

 Hi All,

I'm having a problem getting elc to run any simulations. I'm currently testing on two small inverters. 

 Whenever I run db_spice I get the following message: 

 [WARNING(db_spice)]No spice simulation to do, please check the cell/process list for any error

I can't find any errors in my configuration files. Would someone please look at them and tell me if they see anything wrong?

Here is my elccfg:

 #Specify the environment variable settings.
EC_SIM_USE_LSF=1;
EC_SIM_LSF_CMD=" ";
EC_SIM_LSF_PARALLEL=2;
EC_SIM_TYPE="hspice";
EC_SIM_NAME="hspice";
EC_SPICE_SIMPLIFY=1;
EC_CHAR="ECSM-TIMING ECSM-POWER";
 
#Specify the characterization inputs.
 
SUBCKT="my_cells.sp";
MODEL="my_typical_models.sp";
DESIGNS="INVX1 INVX2";
SETUP="my_setup.ss";
PROCESS="typical";

And here is my_setup.ss:

 Process my_typical_process {
        voltage = 1.5;
        temp = 25;
        Corner = "typical";
        Vtn = 0.320;
        Vtp = 0.316;
};

Group POWR{
        PIN = VDD;
};

Index inv_index {
        Slew = 0.028n 0.044n 0.076n 0.138n 0.264n 0.516n 1.02n ;
        Load = 0.00079p 0.002054p 0.00474p 0.010112p 0.020856p 0.042186p 0.08532p ;
};

Signal std_cell_sig {
        unit = REL;
        Vh=1.0 1.0;
        Vl=0.0 0.0;
        Vth=0.5 0.5;
        Vsh=0.8 0.8;
        Vsl=0.2 0.2;
        tsmax=2.0n;
};

Signal power_sig {
        unit = ABS;
        Vh=1.5 1.5;
        Vl=0.0 0.0;
        Vth=0.75 0.75;
        Vsh=2.0 2.0;
        Vsl=0.5 0.5;
        tsmax=2.0n;
};

 Margin m0 {
        setup   = 1.0 0.0 ;
        hold    = 1.0 0.0 ;
        release = 1.0 0.0 ;
        removal = 1.0 0.0 ;
        recovery = 1.0 0.0 ;
        width   = 1.0 0.0 ;
        delay   = 1.0 0.0 ;
        power   = 1.0 0.0 ;
        cap     = 1.0 0.0 ;
};

Nominal n0 {
        delay = 0.5 0.5 ;
        power = 0.5 0.5 ;
        cap   = 0.5 0.5 ;
};

Simulation std_cell_sim {
        transient = 0.01 80n 10p;
//      dc = 0.1 4.5 0.1;
        bisec = 6.0n 6.0n 100p;
        resistance = 10MEG;
};

set process(my_typical_process) {
        simulation = std_cell_sim;
        index = inv_index;
        signal = std_cell_sig;
        margin = m0;
        nominal = n0;
};

set signal(my_typical_process) {
        Group(POWR) = power_sig;
};

 

Thanks!

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  • mbhealy
    mbhealy over 15 years ago
    I figured out that the problem was with my subcircuit definitions. ELC seems to be abstracting away all my ports for some reason. This seems to be related to the fact that Calibre has extracted each net of the circuit into it's own subcircuit definition and then connected the transistors and coupling capacitances to these net-modeling subcircuits.
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  • mbhealy
    mbhealy over 15 years ago
    I figured out that the problem was with my subcircuit definitions. ELC seems to be abstracting away all my ports for some reason. This seems to be related to the fact that Calibre has extracted each net of the circuit into it's own subcircuit definition and then connected the transistors and coupling capacitances to these net-modeling subcircuits.
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