Stats

  • Locked Locked
  • Replies 1
  • Subscribers 90
  • Views 12771
  • Members are here 0
This discussion has been locked.
You can no longer post new replies to this discussion. If you have a question you can start a new discussion

Power constraints for CTS

Rajesh Vembu

 Is there a way to provide power constraints (max. power consumption on a clock network) for CTS?

From my understanding, PowerAware CTS only tries to reduce the power consumed on the clock path. however to get it to desired power might require manual eco/optimization of the elements in the clock path.

 

If CTS can be driven to take power as one of the constraints it would be good and achieving the desired power on Clock network can be automated. Is this feature already available in Encounter?

  • Hi Rajesh,

    As of now (9.1 timeframe) power aware CTS tries to minimize power without degrading skew and insertion day.  There isn't an ability to dial-in the power constraint to a specified number.  I've passed your feedback along to R&D for future consideration- thanks for sharing.

    Thanks,
    Bob

     

Community Guidelines

The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.