How to specify the distance between 2 macros (top,left,bottom,right) in the multiple row in FP

Hi Prashant,

For spacing/aligning your macros, check out the floorplanning options:

Floorplan->Edit Floorplan->Align Instances, Shift Instances, Space Instances

The power question is a bit more difficult to answer. Coming up with a power grid can be challenging. You want to have a grid that supplies enough power to all your components without going below an IR-drop limit that you have decided on. Most folks pick 5% of the supply (that means a 2.5% drop for VDD and a 2.5% bounce for VSS).

Then you need to decide which layers to use for the grid and the widths. Most people do back-of-the-envelope calculations or use a spreadsheet which calculates the IR-drop based on total power consumption, supply voltage, resistance of the metal layers, and widths/pitches of the metal layers. You can plug different widths and pitches for the layers into the spreadsheet until you get an acceptable IR-drop number. This can work well for wirebond designs, but becomes much more complicated for flip-chip designs. (But flip chips will need less of a grid, since power is coming into the design at regular intervals and not just from the chip boundary.)

You will also want to center your power stripes on the routing grids so that you don't use up signal routing tracks unnecessarily. We have also found that more stripes of narrower width are better than fewer stripes of wider width for routability. But you don't want the power stripes to be too narrow (too much resistance).

It's a good idea to do IR-drop analysis as early as possible in the flow to vet your power structure. When using a toggle rate for IR-drop analysis, a typical number is 20%. Some folks think this is a bit high, but others will say it's a bit low. It really depends on the chip and how it operates. For example, in test mode, you may be toggling everything more than you would in functional mode, and may want to use a higher toggle rate. But in general, the clocks use the most power and they are always toggling 100% (except for gated clocks).

I probably didn't completely answer your power questions, but as you can see, there is a lot involved.

I hope this helps out at least a little bit.

- Kari

Hi Prashant,

For spacing/aligning your macros, check out the floorplanning options:

Floorplan->Edit Floorplan->Align Instances, Shift Instances, Space Instances

The power question is a bit more difficult to answer. Coming up with a power grid can be challenging. You want to have a grid that supplies enough power to all your components without going below an IR-drop limit that you have decided on. Most folks pick 5% of the supply (that means a 2.5% drop for VDD and a 2.5% bounce for VSS).

Then you need to decide which layers to use for the grid and the widths. Most people do back-of-the-envelope calculations or use a spreadsheet which calculates the IR-drop based on total power consumption, supply voltage, resistance of the metal layers, and widths/pitches of the metal layers. You can plug different widths and pitches for the layers into the spreadsheet until you get an acceptable IR-drop number. This can work well for wirebond designs, but becomes much more complicated for flip-chip designs. (But flip chips will need less of a grid, since power is coming into the design at regular intervals and not just from the chip boundary.)

You will also want to center your power stripes on the routing grids so that you don't use up signal routing tracks unnecessarily. We have also found that more stripes of narrower width are better than fewer stripes of wider width for routability. But you don't want the power stripes to be too narrow (too much resistance).

It's a good idea to do IR-drop analysis as early as possible in the flow to vet your power structure. When using a toggle rate for IR-drop analysis, a typical number is 20%. Some folks think this is a bit high, but others will say it's a bit low. It really depends on the chip and how it operates. For example, in test mode, you may be toggling everything more than you would in functional mode, and may want to use a higher toggle rate. But in general, the clocks use the most power and they are always toggling 100% (except for gated clocks).

I probably didn't completely answer your power questions, but as you can see, there is a lot involved.

I hope this helps out at least a little bit.

- Kari