• Skip to main content
  • Skip to search
  • Skip to footer
Cadence Home
  • This search text may be transcribed, used, stored, or accessed by our third-party service providers per our Cookie Policy and Privacy Policy.

  1. Community Forums
  2. Digital Implementation
  3. about postMask ECO

Stats

  • Locked Locked
  • Replies 0
  • Subscribers 91
  • Views 12740
  • Members are here 0
This discussion has been locked.
You can no longer post new replies to this discussion. If you have a question you can start a new discussion

about postMask ECO

icmaple
icmaple over 15 years ago


  there is a NAND gate added in non-clock path. For postMask eco flow:

###################################
## !! post_mask eco flow
###################################

loadConfig ./${cell_name}.conf 0

set rda_Input(ui_netlist) $econetlist
commitConfig

#loadFPlan ${cell_name}.fp
ecoDefIn -postMask -suffix _spare -reportFile ecoDefIn.rpt ../def/${cell_name}.def
applyGlobalNets

specifySpareGate -inst *spare_cell*

#ecoRemap 
ecoPlace -useSpareCells

  When i finish above stages. i do  reportClockTree  -postRoute , I found skew of clock tree  changed!

 

  • Cancel

Community Guidelines

The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.

© 2025 Cadence Design Systems, Inc. All Rights Reserved.

  • Terms of Use
  • Privacy
  • Cookie Policy
  • US Trademarks
  • Do Not Sell or Share My Personal Information