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Delete all buffers between IO ang register

spach

hi

i need to delete all series of buffers with fanput 1 from input to register & register to output

one way is using deletebuffertree command with selected nets(nets b/w buffers).

can any one tell me how i can get all net names between input & register, register & output using encounter db commands.

regards,

suresh pachha  

Parents

  • Thanks for u r reply Bob.

    I already checked about fanout by report_timing on those paths. All buffers or inverters between IOs to register r having fanout 1. 

    Actually some IO ports are far away from registers and have direct connections to register D pin(incase of Input port) or Q pin(incase of Output port). I want to delete all the buffers added by optDesign and freshly start building CTS by specifying Input port as root pin and register D pin as leaf pin incase of In2reg path. I tried 2 ways to delete these buffers

    1.deletebuffertree with selectnet option and given all the nets b/w input & register

    2.deleteclocktree -clk <rootpin> after specifying clock spec.

    after deleting buffers i tried cts, it worked but due to this others paths got effected.

    can u please tell me at what satge i do cts or buffertreesynthesis and what settings i need to do so that other paths should not be effected. 

    Regards,

    suresh pachha

Reply

  • Thanks for u r reply Bob.

    I already checked about fanout by report_timing on those paths. All buffers or inverters between IOs to register r having fanout 1. 

    Actually some IO ports are far away from registers and have direct connections to register D pin(incase of Input port) or Q pin(incase of Output port). I want to delete all the buffers added by optDesign and freshly start building CTS by specifying Input port as root pin and register D pin as leaf pin incase of In2reg path. I tried 2 ways to delete these buffers

    1.deletebuffertree with selectnet option and given all the nets b/w input & register

    2.deleteclocktree -clk <rootpin> after specifying clock spec.

    after deleting buffers i tried cts, it worked but due to this others paths got effected.

    can u please tell me at what satge i do cts or buffertreesynthesis and what settings i need to do so that other paths should not be effected. 

    Regards,

    suresh pachha

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