RTL compiler - elaborate problem.

The first I would check whether operating condition is defined in your tt_1p2v_25c.lib file as below

  operating_conditions(tt_1p2v_25c) {
    process    : 1;
    temperature    : 25;
    voltage    : 1.2;
    tree_type    : balanced_tree
  }

The first thing this question will be relevant in logic design forum instead of digital implementation forum .

 Looking at your error, elaborate -libpath /home/ssriram/project -libext .lib mult.v, is confusing.

Usually we have 

set_attribute lib_search_path home/ssriram/project/

set_attribute library tt_1p2v_25c

read_hdl *.v

elaborate $design

I am not sure what are your commands . It will help if you run each command in your script line by line in RC prompt and see which command is giving you error. 

Did you try running each command in a RC instead of running whole script? Is it the "elaborate -libpath /home/ssriram/project -libext .lib mult.v" that's giving you error? what happends if you just do "elaborate <top level of your design>"  ?

Hi sandeepsuhas,

I believe you are using the commands incorrectly

 rc:/> elab -h
  elaborate: elaborates previously read HDL files and creates corresponding design and subdesigns

Usage: elaborate [-parameters <string>] [-libpath <string>]+ [-libext <string>]+ [<string>+]

    [-parameters <string>]:
        specifies a list of parameter/value pairs for top-level Verilog module or VHDL entity
    [-libpath <string>]:
        defines Verilog library search path
    [-libext <string>]:
        defines Verilog library file extension
    [<string>+]:
        the top-level Verilog modules or VHDL architectures to elaborate

You can see in the usage that -libpath refers to the Verilog library search path and not the Technology libraries hence your -libext should certainly not have .lib in it.

 I normally set libraries using 

 set_attribute library <library file list>  /

 Also, RC questions are probably better suited for the logic design forum I think.

good luck,

gh-