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Antenna Error in Calibre DRC but Passed antenna check in Encounter

mingfatty
Dear Experts, I am using encounter to do my place and route after having obtain the macro lef from the abstract generator, everything's going fine until i stream out my gds2 file and check the DRC using Calibre in virtuoso, where i am getting hundreds of antenna error out of the antenna check. I wonder how could this happened and not reported in encounter. i am desperately need this to be solved and proceed to the tape-out. FYI, i am using IBM 130nm technology, and i am using the technology lef that provided by foundry (i wonder do i need to change any of my lef file to suit the Calibre check). Please kindly help! Thank you! Regards, MF
Parents

  • Hi Alex,

    Thanks for the quick reply, actually i am able to put the antenna cell into my design during the place and route. and it is able to fix the antenna error in encounter as well, but the problem is that, when i stream out the design to do the calibre DRC check in virtuoso, hundreds of antenna error is reported, FYI following is the example of the macro lef i created,

     MACRO DL_XOR_NXOR2X1
      CLASS CORE ;
      ORIGIN 0 0 ;
      FOREIGN DL_XOR_NXOR2X1 0 0 ;
      SIZE 8 BY 4 ;
      SYMMETRY X Y ;
      SITE core ;
      PIN gnd!
        DIRECTION INOUT ;
        USE GROUND ;
        SHAPE ABUTMENT ;
        PORT
          LAYER M1 ;
            RECT 0.76 0 1.04 1.19 ;
            RECT 6.96 0 7.24 1.25 ;
            RECT 0 0 8 0.28 ;
        END
      END gnd!
      PIN vdd!
        DIRECTION INOUT ;
        USE POWER ;
        SHAPE ABUTMENT ;
        PORT
          LAYER M1 ;
            RECT 0.76 2.8 1.04 4 ;
            RECT 3.15 2.81 3.43 4 ;
            RECT 4.09 2.73 4.37 4 ;
            RECT 6.01 2.8 6.29 4 ;
            RECT 6.96 2.79 7.24 4 ;
            RECT 0 3.72 8 4 ;
        END
      END vdd!
      PIN nB
        DIRECTION INPUT ;
        USE SIGNAL ;
        ANTENNAMODEL OXIDE1 ;
          ANTENNAGATEAREA 0.2016 LAYER M1 ;
        PORT
          LAYER M1 ;
            RECT 1.98 1.69 2.28 1.99 ;
        END
      END nB
      PIN Q
        DIRECTION OUTPUT ;
        USE SIGNAL ;
        ANTENNADIFFAREA 0.2688 LAYER M1 ;
        PORT
          LAYER M1 ;
            RECT 7.44 0.97 7.88 1.25 ;
            RECT 7.72 0.97 7.88 3.03 ;
            RECT 7.44 2.73 7.88 3.03 ;
        END
      END Q
      PIN A
        DIRECTION INPUT ;
        USE SIGNAL ;
        ANTENNAMODEL OXIDE1 ;
          ANTENNAGATEAREA 0.2016 LAYER M1 ;
        PORT
          LAYER M1 ;
            RECT 3.82 1.69 4.31 1.99 ;
        END
      END A
      PIN nA
        DIRECTION INPUT ;
        USE SIGNAL ;
        ANTENNAMODEL OXIDE1 ;
          ANTENNAGATEAREA 0.2016 LAYER M1 ;
        PORT
          LAYER M1 ;
            RECT 1.36 3.24 1.66 3.54 ;
        END
      END nA
      PIN REQ
        DIRECTION OUTPUT ;
        USE SIGNAL ;
        ANTENNADIFFAREA 0 LAYER M1 ;
        ANTENNAMODEL OXIDE1 ;
          ANTENNAGATEAREA 0.2016 LAYER M1 ;
        PORT
          LAYER M1 ;
            RECT 1.15 2.01 1.45 2.31 ;
            RECT 6.64 2.01 6.94 2.31 ;
            RECT 1.15 2.15 6.94 2.31 ;
        END
      END REQ
      PIN B
        DIRECTION INPUT ;
        USE SIGNAL ;
        ANTENNAMODEL OXIDE1 ;
          ANTENNAGATEAREA 0.2016 LAYER M1 ;
        PORT
          LAYER M1 ;
            RECT 2.86 1.69 3.16 1.99 ;
            RECT 3.32 1.35 3.48 1.85 ;
            RECT 2.86 1.69 3.48 1.85 ;
            RECT 3.32 1.35 4.69 1.51 ;
            RECT 4.53 1.35 4.69 1.86 ;
            RECT 4.53 1.7 5.16 1.86 ;
            RECT 4.88 1.7 5.16 1.99 ;
        END
      END B
      PIN nQ
        DIRECTION OUTPUT ;
        USE SIGNAL ;
        ANTENNADIFFAREA 0.2688 LAYER M1 ;
        PORT
          LAYER M1 ;
            RECT 0.12 0.97 0.28 3.03 ;
            RECT 0.12 0.97 0.56 1.25 ;
            RECT 0.12 2.73 0.56 3.03 ;
        END
      END nQ
      OBS
        LAYER M1 ;
          RECT 2.67 0.97 2.95 1.25 ;
          RECT 0.77 1.35 2.83 1.51 ;
          RECT 2.67 0.97 2.83 1.51 ;
          RECT 0.63 1.46 0.93 1.76 ;
          RECT 0.77 1.35 0.93 2.64 ;
          RECT 0.77 2.48 2.35 2.64 ;
          RECT 2.19 2.48 2.35 3.03 ;
          RECT 1.24 2.48 1.4 3.03 ;
          RECT 1.24 2.8 1.52 3.03 ;
          RECT 2.19 2.74 2.47 3.03 ;
          RECT 1.83 0.65 3.63 0.81 ;
          RECT 3.47 0.65 3.63 1.19 ;
          RECT 1.83 0.65 1.99 1.19 ;
          RECT 1.31 0.97 1.99 1.19 ;
          RECT 3.47 0.97 3.75 1.19 ;
          RECT 2.79 2.47 3.79 2.63 ;
          RECT 3.63 2.47 3.79 3.03 ;
          RECT 1.7 2.8 1.98 3.03 ;
          RECT 2.67 2.75 2.95 3.03 ;
          RECT 3.63 2.73 3.91 3.03 ;
          RECT 1.82 2.8 1.98 3.36 ;
          RECT 2.79 2.47 2.95 3.36 ;
          RECT 1.82 3.2 2.95 3.36 ;
          RECT 4.57 2.73 4.85 3.03 ;
          RECT 5.53 2.8 5.81 3.03 ;
          RECT 4.69 2.73 4.85 3.47 ;
          RECT 5.53 2.8 5.69 3.47 ;
          RECT 4.69 3.31 5.69 3.47 ;
          RECT 4.37 0.65 6.17 0.81 ;
          RECT 6.01 0.65 6.17 1.19 ;
          RECT 4.37 0.65 4.53 1.19 ;
          RECT 4.25 0.97 4.53 1.19 ;
          RECT 6.01 0.97 6.29 1.19 ;
          RECT 5.53 0.97 5.81 1.19 ;
          RECT 6.47 0.97 6.75 1.25 ;
          RECT 5.65 0.97 5.81 1.51 ;
          RECT 6.47 0.97 6.63 1.51 ;
          RECT 5.65 1.35 6.63 1.51 ;
          RECT 4.73 0.97 5.12 1.19 ;
          RECT 4.96 0.97 5.12 1.54 ;
          RECT 4.96 1.38 5.49 1.54 ;
          RECT 5.33 1.38 5.49 1.83 ;
          RECT 5.33 1.67 7.26 1.83 ;
          RECT 7.1 2.11 7.4 2.41 ;
          RECT 7.1 1.67 7.26 2.63 ;
          RECT 5.17 2.47 7.26 2.63 ;
          RECT 5.17 2.47 5.33 3.03 ;
          RECT 5.05 2.8 5.33 3.03 ;
          RECT 6.49 2.47 6.77 3.03 ;
      END
    END DL_XOR_NXOR2X1

    I wonder whether this discrepancy is caused by the tech .lef where i use it directly as provided by the foundry. Thanks! Regards, MF

Reply

  • Hi Alex,

    Thanks for the quick reply, actually i am able to put the antenna cell into my design during the place and route. and it is able to fix the antenna error in encounter as well, but the problem is that, when i stream out the design to do the calibre DRC check in virtuoso, hundreds of antenna error is reported, FYI following is the example of the macro lef i created,

     MACRO DL_XOR_NXOR2X1
      CLASS CORE ;
      ORIGIN 0 0 ;
      FOREIGN DL_XOR_NXOR2X1 0 0 ;
      SIZE 8 BY 4 ;
      SYMMETRY X Y ;
      SITE core ;
      PIN gnd!
        DIRECTION INOUT ;
        USE GROUND ;
        SHAPE ABUTMENT ;
        PORT
          LAYER M1 ;
            RECT 0.76 0 1.04 1.19 ;
            RECT 6.96 0 7.24 1.25 ;
            RECT 0 0 8 0.28 ;
        END
      END gnd!
      PIN vdd!
        DIRECTION INOUT ;
        USE POWER ;
        SHAPE ABUTMENT ;
        PORT
          LAYER M1 ;
            RECT 0.76 2.8 1.04 4 ;
            RECT 3.15 2.81 3.43 4 ;
            RECT 4.09 2.73 4.37 4 ;
            RECT 6.01 2.8 6.29 4 ;
            RECT 6.96 2.79 7.24 4 ;
            RECT 0 3.72 8 4 ;
        END
      END vdd!
      PIN nB
        DIRECTION INPUT ;
        USE SIGNAL ;
        ANTENNAMODEL OXIDE1 ;
          ANTENNAGATEAREA 0.2016 LAYER M1 ;
        PORT
          LAYER M1 ;
            RECT 1.98 1.69 2.28 1.99 ;
        END
      END nB
      PIN Q
        DIRECTION OUTPUT ;
        USE SIGNAL ;
        ANTENNADIFFAREA 0.2688 LAYER M1 ;
        PORT
          LAYER M1 ;
            RECT 7.44 0.97 7.88 1.25 ;
            RECT 7.72 0.97 7.88 3.03 ;
            RECT 7.44 2.73 7.88 3.03 ;
        END
      END Q
      PIN A
        DIRECTION INPUT ;
        USE SIGNAL ;
        ANTENNAMODEL OXIDE1 ;
          ANTENNAGATEAREA 0.2016 LAYER M1 ;
        PORT
          LAYER M1 ;
            RECT 3.82 1.69 4.31 1.99 ;
        END
      END A
      PIN nA
        DIRECTION INPUT ;
        USE SIGNAL ;
        ANTENNAMODEL OXIDE1 ;
          ANTENNAGATEAREA 0.2016 LAYER M1 ;
        PORT
          LAYER M1 ;
            RECT 1.36 3.24 1.66 3.54 ;
        END
      END nA
      PIN REQ
        DIRECTION OUTPUT ;
        USE SIGNAL ;
        ANTENNADIFFAREA 0 LAYER M1 ;
        ANTENNAMODEL OXIDE1 ;
          ANTENNAGATEAREA 0.2016 LAYER M1 ;
        PORT
          LAYER M1 ;
            RECT 1.15 2.01 1.45 2.31 ;
            RECT 6.64 2.01 6.94 2.31 ;
            RECT 1.15 2.15 6.94 2.31 ;
        END
      END REQ
      PIN B
        DIRECTION INPUT ;
        USE SIGNAL ;
        ANTENNAMODEL OXIDE1 ;
          ANTENNAGATEAREA 0.2016 LAYER M1 ;
        PORT
          LAYER M1 ;
            RECT 2.86 1.69 3.16 1.99 ;
            RECT 3.32 1.35 3.48 1.85 ;
            RECT 2.86 1.69 3.48 1.85 ;
            RECT 3.32 1.35 4.69 1.51 ;
            RECT 4.53 1.35 4.69 1.86 ;
            RECT 4.53 1.7 5.16 1.86 ;
            RECT 4.88 1.7 5.16 1.99 ;
        END
      END B
      PIN nQ
        DIRECTION OUTPUT ;
        USE SIGNAL ;
        ANTENNADIFFAREA 0.2688 LAYER M1 ;
        PORT
          LAYER M1 ;
            RECT 0.12 0.97 0.28 3.03 ;
            RECT 0.12 0.97 0.56 1.25 ;
            RECT 0.12 2.73 0.56 3.03 ;
        END
      END nQ
      OBS
        LAYER M1 ;
          RECT 2.67 0.97 2.95 1.25 ;
          RECT 0.77 1.35 2.83 1.51 ;
          RECT 2.67 0.97 2.83 1.51 ;
          RECT 0.63 1.46 0.93 1.76 ;
          RECT 0.77 1.35 0.93 2.64 ;
          RECT 0.77 2.48 2.35 2.64 ;
          RECT 2.19 2.48 2.35 3.03 ;
          RECT 1.24 2.48 1.4 3.03 ;
          RECT 1.24 2.8 1.52 3.03 ;
          RECT 2.19 2.74 2.47 3.03 ;
          RECT 1.83 0.65 3.63 0.81 ;
          RECT 3.47 0.65 3.63 1.19 ;
          RECT 1.83 0.65 1.99 1.19 ;
          RECT 1.31 0.97 1.99 1.19 ;
          RECT 3.47 0.97 3.75 1.19 ;
          RECT 2.79 2.47 3.79 2.63 ;
          RECT 3.63 2.47 3.79 3.03 ;
          RECT 1.7 2.8 1.98 3.03 ;
          RECT 2.67 2.75 2.95 3.03 ;
          RECT 3.63 2.73 3.91 3.03 ;
          RECT 1.82 2.8 1.98 3.36 ;
          RECT 2.79 2.47 2.95 3.36 ;
          RECT 1.82 3.2 2.95 3.36 ;
          RECT 4.57 2.73 4.85 3.03 ;
          RECT 5.53 2.8 5.81 3.03 ;
          RECT 4.69 2.73 4.85 3.47 ;
          RECT 5.53 2.8 5.69 3.47 ;
          RECT 4.69 3.31 5.69 3.47 ;
          RECT 4.37 0.65 6.17 0.81 ;
          RECT 6.01 0.65 6.17 1.19 ;
          RECT 4.37 0.65 4.53 1.19 ;
          RECT 4.25 0.97 4.53 1.19 ;
          RECT 6.01 0.97 6.29 1.19 ;
          RECT 5.53 0.97 5.81 1.19 ;
          RECT 6.47 0.97 6.75 1.25 ;
          RECT 5.65 0.97 5.81 1.51 ;
          RECT 6.47 0.97 6.63 1.51 ;
          RECT 5.65 1.35 6.63 1.51 ;
          RECT 4.73 0.97 5.12 1.19 ;
          RECT 4.96 0.97 5.12 1.54 ;
          RECT 4.96 1.38 5.49 1.54 ;
          RECT 5.33 1.38 5.49 1.83 ;
          RECT 5.33 1.67 7.26 1.83 ;
          RECT 7.1 2.11 7.4 2.41 ;
          RECT 7.1 1.67 7.26 2.63 ;
          RECT 5.17 2.47 7.26 2.63 ;
          RECT 5.17 2.47 5.33 3.03 ;
          RECT 5.05 2.8 5.33 3.03 ;
          RECT 6.49 2.47 6.77 3.03 ;
      END
    END DL_XOR_NXOR2X1

    I wonder whether this discrepancy is caused by the tech .lef where i use it directly as provided by the foundry. Thanks! Regards, MF

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