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  3. how to avoid this problem?

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how to avoid this problem?

archive
archive over 17 years ago

   I found some paths easy violation as shown in attechment after CTS. The ICG cell is traced through and the skew is balanced between A and C. But the violation easy occur between A and B(ICG cell). How do I avoid this problem?


Originally posted in cdnusers.org by Dota
  • unbanlanced CTS for icg cell.JPG
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  • archive
    archive over 17 years ago

    set_clock_gating_check is here just to avoid pre-CTS optimization to be to optimistic.
    In standard flow it must be use from synthesis to CTS step.

    I aggree that CTS are no timing aware (it's a shame....), but if you can help the tool a little bit, it will give better result.
    If your Enable path is too long, for sure it will be very difficult to close timing. The only solution might be to play with usefull skew...

    Pat.


    Originally posted in cdnusers.org by bougantp
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  • archive
    archive over 17 years ago

    set_clock_gating_check is here just to avoid pre-CTS optimization to be to optimistic.
    In standard flow it must be use from synthesis to CTS step.

    I aggree that CTS are no timing aware (it's a shame....), but if you can help the tool a little bit, it will give better result.
    If your Enable path is too long, for sure it will be very difficult to close timing. The only solution might be to play with usefull skew...

    Pat.


    Originally posted in cdnusers.org by bougantp
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