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  3. DRC violation after trial routing

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DRC violation after trial routing

Greatrebel
Greatrebel over 15 years ago

 Hi all,

I am designing P&R for a digital chip. After trial routing, I got thousands of DRC violations, most of which are M1 to M1 violations and happen in standard cells. The thing is that after trial routing, Via between M1 and M2 are generated. Those Vias have a small portion of M1 which break the spacing design rule to other M1 wire in standard cells. It seems like the orientation of Via M1 causes some violations. They are all horizontal.

Can anyone tell me how to fix those violations which are still there after Nanorouting. and how to change the orientation of Via.

Thanks in advance

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  • mikhail
    mikhail over 15 years ago

    Hi,

    Trial routing is dirty routing that typically used for estimation. So, DRC violations are expected. But if they still exist after Nanorouting (I mean the same violations) you need to check that dirty routing is deleted by NanoRoute before performing actual global/detail phase. Use editDelete -type Signal to delete all signal wires before NanoRoute. Please notice that clock wires will be deleted too. You can deselect it from deletion by using editSelect/editDeselect commands.

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  • Greatrebel
    Greatrebel over 15 years ago

     Hi mikhail,

     

    Thank you very much for your help.  After cleaning all signals created by trial routing and re-runing Nano routing, those voilations were gone.

    Thanks a lot

     

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