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How to check LVS in Encounter

Greatrebel

 Hi All,

 I am designing PnR for a digital chip using Encounter. Currently we do not have GDS files but LEF files for std cells from vendor. I am wondering how I can do LVS check in Encounter. Or do I need to use other tools like Assura to do LVS? Since I do not have schematic, whehter I need to convert the netlist into schematic, and which netlist I should use for the convertion, the one I used as design import for PnR or the one generated by Encounter after routing?

 Thanks in advanced

 

Parents

  • The netlist that should be used for LVS verification is the one generated by Encounter after routing because it will contain cells used to optimize the design (clock trees, timing optimization, etc).  Whether you import the netlist to a schematic or use the netlist directory in verification depends on the tools you are using and your perferred methodology.

     

    As for LVS, in Encounter you can try running the verification checks from the Verify menu ("Verify Geometry", "Verify Connectivity", etc) but I rarely use this because it always reports lots of false errors (probably due to LEF techfile issues). Regardless, you should not rely on this for final verification. You should use Assura or Calibre or some other industry standard signoff verification tool. But if you do not have layouts for the standard cells, you won't be able to do this.

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  • The netlist that should be used for LVS verification is the one generated by Encounter after routing because it will contain cells used to optimize the design (clock trees, timing optimization, etc).  Whether you import the netlist to a schematic or use the netlist directory in verification depends on the tools you are using and your perferred methodology.

     

    As for LVS, in Encounter you can try running the verification checks from the Verify menu ("Verify Geometry", "Verify Connectivity", etc) but I rarely use this because it always reports lots of false errors (probably due to LEF techfile issues). Regardless, you should not rely on this for final verification. You should use Assura or Calibre or some other industry standard signoff verification tool. But if you do not have layouts for the standard cells, you won't be able to do this.

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