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How to check LVS in Encounter

Greatrebel

 Hi All,

 I am designing PnR for a digital chip using Encounter. Currently we do not have GDS files but LEF files for std cells from vendor. I am wondering how I can do LVS check in Encounter. Or do I need to use other tools like Assura to do LVS? Since I do not have schematic, whehter I need to convert the netlist into schematic, and which netlist I should use for the convertion, the one I used as design import for PnR or the one generated by Encounter after routing?

 Thanks in advanced

 

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