How to find ThroughPin(s) for generated clock

Hi all,

in our design we use a number of generated clocks, i.e. the main clock is for instance divided by 13339. The clock dividers are specified as generated_clock in the SDC file. Now, we would like to build a clock tree for the main clock including the generated clock domains. This should be possible with the ThroughPin feature of the clocktree spec. However, we are unsure of how to correctly define our scenario using ThroughPins. Do we actually need to specify a ThroughPin entry for every bit of the counter that divides the clock? Or is this the wrong approach anyway?

We have tried some approaches by now but still cannot achieve timing closure on our design, so we would be thankful for any suggestions and background explanations.