CLP level shifter signal input pin connection errors

Hi All,

This level shifter has two inputs A and B. This shifter is performing  AND function on these inputs.  See below portion of lib file.  I want to use this L-shifter as  just L-shifter, not as isolation-level_shifter. See level shifter definition.  When I commit CPF, encounter insert LS and place them at the right location.  It connects input pin A to the signal coming from High power domain and Y signal going to low power domain. But leaves input B unconnected. Of course when I CLP I get following errors. See below.  There are two ways I can deal with this unconnected pin B. One, is connect to constant high.  Other, is connect both A and B to same input signal.   Is there a way I can enforce either of these two. Leaving un-driven is not desirable. 

Thanks,

Irfan

cell (LVL_IN_AND_H_L)  {
pin (Y)  {
      capacitance : 0.0000000;
      max_capacitance : 180.00;
      direction : output;
      function : "A&B";
    }

}

CPF portion:

#High to Low
define_level_shifter_cell -cells LVL_IN_AND_H_L  \
-input_voltage_range 1.425 -output_voltage_range 0.9 \
-output_power_pin VDD  -direction down -ground VSS \
-valid_location to

 #create rules for level shifter
create_level_shifter_rule -name lsr2 -from PD2 -to PD1
update_level_shifter_rules -names lsr2 -location to

Error after running CLP:

CLP_STRC2: Input to low power cell is undriven
    Severity: Error      Occurrence: 45
    1: Pin 'B' of 'jbsw0/CPF_LS_44_rom_pbt_rdata_0_' (LVL_IN_AND_H_L) is undriven
    2: Pin 'B' of 'jbsw0/CPF_LS_43_rom_pbt_rdata_1_' (LVL_IN_AND_H_L) is undriven