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  3. How to report latency at a sink pin in encounter

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How to report latency at a sink pin in encounter

archive
archive over 17 years ago

I want to know how to report latency of a sink pin in encounter.
Suppose I have a pin "a/b/c/d/CK" .How to report the latency.

I tried the following command.
get_property [get_pins a/b/c/d/CK] arrival_rise_max..But the value it reports is quite different from the value I see at the same pin after timedesign and report_timing.Is there a more reliable command.
Most of the switches in get_property are not working like latency_max_rise etc..


Originally posted in cdnusers.org by abhiroy03
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  • archive
    archive over 17 years ago

    Bob -

    This is from CTS point of view.

    Lets say I have two clocks -

    create_clock -name CLK1 ....
    create_generated_clock -name CLK2 -source CLK1 ....

    Lets say I change create_generated_clock to create_clock and I do CTS on CLK2 first.

    Now I want to do CTS on CLK1 but I want to do it such that it balances CLK1 to CLK2. In synopsys I could declare the start point of CLK2 as a sync pin with the following command -
    dbDefineSyncPin

    That way the tool could balance CLK1 to CLK2 knowing the latency of CLK2.

    I am investigating two step CTS as opposed to 1 step CTS with through pins because I want to control rise and fall times with a lot more control.

    Let me know if there are other ways to do this. Incidentally there are other such several questions that I have that are related to this semi manual CTS process.

    Regards,

    Sanjay


    Originally posted in cdnusers.org by ssunder@sioptical.com
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  • archive
    archive over 17 years ago

    Bob -

    This is from CTS point of view.

    Lets say I have two clocks -

    create_clock -name CLK1 ....
    create_generated_clock -name CLK2 -source CLK1 ....

    Lets say I change create_generated_clock to create_clock and I do CTS on CLK2 first.

    Now I want to do CTS on CLK1 but I want to do it such that it balances CLK1 to CLK2. In synopsys I could declare the start point of CLK2 as a sync pin with the following command -
    dbDefineSyncPin

    That way the tool could balance CLK1 to CLK2 knowing the latency of CLK2.

    I am investigating two step CTS as opposed to 1 step CTS with through pins because I want to control rise and fall times with a lot more control.

    Let me know if there are other ways to do this. Incidentally there are other such several questions that I have that are related to this semi manual CTS process.

    Regards,

    Sanjay


    Originally posted in cdnusers.org by ssunder@sioptical.com
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