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Will "OptDesign" respect the fences ?

patrice06

Hello,

In a 0.18um design, I have modules which should powered by two seperate power supplies (ex: module 1 by VDD1, module 2 by VDD2). In order to keep the SocEncounter implementation simple, I am trying to keep away of hierarchical partition or  CPF based flow.  I am using fences and globalNetConnect to instruct Sroute to make the right connection to each area.  So far, so good.  But I have not  run any optimization yet.

My question is:  Will the optimization process possibly insert cells without respecting the fences ?  (ie: buffer added for the module 1 netlist but physically ending up in the "module 2 VDD2  fence") Which I cannot afford.   Other possible issues with this methodology ?  Is it recommend to move to a CPF flow ?

Thanks a lot for your inputs.

Best regards

Patrice

  • BobD

    There is a "setOptMode -honorFence true" option so be sure to assert that. Let us know how it goes!

  • patrice06

    Thanks Bob for your quick and clear answer.

    That is working fine.

    And when the constraint cannot be met, the checkPlace clearly reports  a "fence placement violation" .

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