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No matching .SUBCKT statement error in LVS check

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Hello All I am using Calibre-LVS for LVS check between final layout and verilog code both are generated by Cadence-Encounter v4.1. The output log file is enclosed. The LVS does not compare two files because of some errors like: Error: No matching ".SUBCKT" statement for "BFSVTX10" at line 43459 in file "/tmp/lvsRunDir/_decoder36.v.sp" Error: No matching ".SUBCKT" statement for "BFSVTX10" at line 43460 in file "/tmp/lvsRunDir/_decoder36.v.sp" BFSVTX10 is a standard lib given in STM cmos90nm lib. I appreciate your comment to solve this issue. Thanks, Ali


Originally posted in cdnusers.org by Naderi
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  • Hi Ali,

    I'm sorry you're still having problems. I'm afraid we've gone beyond my limited LVS debugging knowledge. :-( Do you have a Calibre AE or Calibre support that can help you?

    After v2lvs, I go right into calibre -lvs.

    - Kari


    Originally posted in cdnusers.org by Kari
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  • Hi Ali,

    I'm sorry you're still having problems. I'm afraid we've gone beyond my limited LVS debugging knowledge. :-( Do you have a Calibre AE or Calibre support that can help you?

    After v2lvs, I go right into calibre -lvs.

    - Kari


    Originally posted in cdnusers.org by Kari
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