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  3. *Fence* *SRC* *MME* Buffers in Clock Tree

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*Fence* *SRC* *MME* Buffers in Clock Tree

Nataraja G
Nataraja G over 14 years ago

With 10.11USR1 enconter  we are seeing new type of buffers being added at CTS

*MMExc__L1_I0 these kind of naming convention was given if a pin was declared excludedPin in clock spec file

but in 10.1 *MMExc*  buffers are being added without specfying excludedPin and this is not because of  loops in clock path ( obviosuly with ckSynthesis -breakloop we are expected to see excluded buffer at loop backs )

I have never seen Insance names with *Fence* and *SRC*   in clock path 

 What do they signify ? i have searched fetxtref and socUG for these things but havn't found anything 

 

hope i am clear ,

 

Thanks

 Nataraja

its good to be back :)

 

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  • Kari
    Kari over 14 years ago

     Welcome back!

    I think SRC has to do with balancing to an output port, and Fence could be due to power domains or setCTSMode -honorFence, or maybe some other things. Do any of these make sense for your design?

     

     

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  • Nataraja G
    Nataraja G over 14 years ago

     we have set this,

     setCTSMode -honorFence false

     still fence buffer's are added and we dont have power domains in the design

     

    Fence buffers are being added to preserve a module port , in SDC file we have generated clock definitions at these ports 

    So ckSynthesis is automatically preserving them ( though i havn't specified them in clock spec file ) ,

    while i was browing in schematic viewer i found this  common to all generated clock's 

     

    i dont think SRC is for balancing Output ports , tool uses CASACDE buffer's if that is the case 

     

    Regards 

    Nataraja

     

     

     

     

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