Stats

  • Locked Locked
  • Replies 2
  • Subscribers 92
  • Views 16584
  • Members are here 0
This discussion has been locked.
You can no longer post new replies to this discussion. If you have a question you can start a new discussion

How to calculate Die size for core limited and Pad limited design?

Ashok Nellore

i Know that If the size of the core is a factor responsible for determining the size of the whole chip, then we say that our design is core limited.

But if the core is too small, and the number of pads are too much to the extent that the size of the chip is determined by the space required to place all the pads, then it is called pad limited.

Ideally speaking, a design should be core limited.

Then How we calculate  the Die size???

  • Hi,

     The die size is determined by die corner rule, seal ring width and scribe line.

     Regards.

  •  You'll have to do some prototyping runs. You can pick a size that gives you a starting core utilization of, say, 55%, then take the design through place and route and see how things look. Is there placement congestion? Routing congestion? Do you have enough room for any special requirements, like space around analog macros, room for shielded analog routes, etc? The more designs you do, the more of a feel you'll get for sizing the core. It's very design/technology dependent, and there's no simple formula.

Community Guidelines

The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.