Hello Cadence community.
Our foundry provides a 150nm process, and our designs are not high-speed by any means. They have not provided a noise library for use with SOC Encounter v9.12 (.cdb or .udn). I have tried to create a cdb file using the make_cdb utility, but there seems to be a major version problem with our spice model file, so I have not had any success with that.
I would like some advice as to what I should do. I know noise analysis plays a bigger role the smaller the process geometry is, but should noise be a concern in 150nm? Our foundry has provided other data files for the Cadence flow, so is the fact that they omitted a noise library a sign that it is not necessary? Is the Liberty timing library (.lib) enough?
We never worried about SI at 130nm and above, but it did come back to haunt us in one 130nm project. I would say at 150nm you don't need to worry about it too much. Set the nanoroute variables for avoiding SI just to be safe; it will make sure you don't have too many long parallel routes.
Hi, what about designing in 28nm process. what is the format or extention of SI libs. or how to generate them?