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Re: RE: RTL compiler inner clock definition

gnangotzi over 13 years ago

Hi,

I have the same problem.

For synthesis with RC compiler I used the "creat_clock" command.

But when I import the design in Soc Encounter for place and route this is not good as the clock is generated by a macro analog block containing a VCO. For the digital fences, now, the clock has to be derived by the output pin of the analog block rather than by an input port. I don't know how to specify this.

Regards

Scrivner over 13 years ago

I think you just need to define your clock to be the maximum frequency that will be allowed by the VCO.
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