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flipchip routing: problem with power routing

Hello,

I am currently working on flipchip power routing. I am facing a problem in that proper routing does not seem to have happened (an open connection is observed). To help you'll visualize - the wire is connected to the pin of the pad but not to the bump. Following are some details:

Tool: EDI 10.13

Assignment: At the moment I have assigned only one PG bump to the corresponding pin to ensure proper routing for one before I move on to route the remaining bumps.

Layer range 10:8

-nets, -constraintFile, -routeWidth -connectPowerCellToBump -type signal have been mentioned as options to fcroute.

designStyle pio (the LEF file has IO cells of type CLASS PAD and not CLASS PAD AREAIO so)

Is there anthing that I could possibly be missing?

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