How to evaluate removal check for asynchronous reset?

I have removal check violation during timing analysis. When I looked at the report, the asynchronous reset goes to two flops, one is clocked by the clock twice faster than the other one. The two clocks are synchronous(same phase). While calculating removal check for slower clock, it is adding one clock period phase shift. This is making the meeting removal check difficult.

My understanding is there should not be phase shift added for removal check. I know in multicycle path we can bring the hold check edge back to avoid buffer addition by the tool. Is there similar solution to the issue I am facing. Any suggestion would be highly appreciated.

Thanks,