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Regarding clock spec file

Ganga111AtFPS

Hi,

I've the following doubt in selecting clock inverters or clock buffers:

 Q) on what basis we choose this much of high drive cells can be used to build clock tree?

is this design dependent like gate count of design and frequency of operation?

Generally I always prefer to use X8 and X12.Why can'n we use low drive like X4 etc..Is there any problem if i choose low drive cells?

Can any body give some clear explanation for the above question?

Parents

  • Large buffers near the CTS root to keep the intermediate input pins transition sharp on these long routes. Smaller buffers are more apropriate for shorter but high fannout leaf driver cells. "SinkMaxTran" & "BufMaxTran"  are droping with each tech node 32nm < 100ps

    Give CTS the full variety of buffers and inverters and see what it wants to naturally use.

    Shawn 

Reply

  • Large buffers near the CTS root to keep the intermediate input pins transition sharp on these long routes. Smaller buffers are more apropriate for shorter but high fannout leaf driver cells. "SinkMaxTran" & "BufMaxTran"  are droping with each tech node 32nm < 100ps

    Give CTS the full variety of buffers and inverters and see what it wants to naturally use.

    Shawn 

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