Stats

  • Locked Locked
  • Replies 1
  • Subscribers 91
  • Views 742
  • Members are here 0
This discussion has been locked.
You can no longer post new replies to this discussion. If you have a question you can start a new discussion

How to tell "verifyGeometry" command to not to flag cell blockage violations (false violations)

noorcadence

HI All,

In my design there is lot shorts , I have debugged the same and found that there is lot of shots with respect to net and cell blockage .like

"  short between  signal net  fyol_n890  & Blockage of Cell fsub_loop_0__flash_sub_sys_inst"

I am using the command   "verifyGeometry -noImplantCheck -noRoutingBlkg -noRoutingBlkgSpacing -noPinInBlkg   -allowPinBlockageAbut -error 100000"

 

please let me know is the any method to report onlly real shorts ????

 

Thanks,

Noor.

 

 

  • HI All,

    In my design there is lot  of shorts , I have debugged the same and found that there is lot of shots with respect to net and cell blockage .like  "  short between  signal net  fyol_n890  & Blockage of Cell fsub_loop_0__flash_sub_sys_inst"

    I am using the command   "verifyGeometry -noImplantCheck -noRoutingBlkg -noRoutingBlkgSpacing -noPinInBlkg   -allowPinBlockageAbut -error 100000"

    please let me know is the any method to report only real shorts ????

Community Guidelines

The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.