Stats

  • Locked Locked
  • Replies 0
  • Subscribers 91
  • Views 12982
  • Members are here 0
This discussion has been locked.
You can no longer post new replies to this discussion. If you have a question you can start a new discussion

Routing of Power Pins of IO pad Pins

amythpai

Hello,

I want to route the power pins of IO pads like the vdd, gnd, A0SRC and all. I have run the global net connect command :

globalNetConnect VDD -type pgpin -pin {vdd} -inst * -module {} 

globalNetConnect GND -type pgpin -pin {gnd} -inst * -module {}

I then tried to route using sroute to route the pins but the metal layer used is thicker than the IO filler cells I have used. Can someone please suggest me te correct way to route the power pins? 

Community Guidelines

The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.