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How to eradicate a net completely

I am writing some commands to delete nets and connect their instTerms to other nets. deleteNet does not always delete the net and its wires. If the net is connected to a top level port I know to use deleteModulePort - first, but if the net was connected to a lower level port in the original netlist hierarchy, how do I trace through hInst/hNet/hTerm to really delete the net and its possible hierarchical port connections? Some of my nets are busses and I'll be deleting all members of that bus. I did figure out that editDelete -net will at least get rid of my wires, but the verification guys don't like when I write a flat Verilog netlist that has wire statements for nets that no longer exist and connect to nothing.

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AThomasL over 12 years ago

Ugh, I give up. Here is an example of a net that just won't go away:
<CMD> dbGet $net.??
allTerms: 0x0
avoidDetour: 0
bottomPreferredLayer: 0x255fa5a0
box: {2147483.647 2147483.647 -2147483.648 -2147483.648}
bus: 0x0
hNets: 0x2abc364cbdc0 0x2abc364cbd30 0x2abc364cbc10
instTerms: 0x0
isAnalog: 0
isCTSClock: 0
isClock: 0
isDontTouch: 0
isExternal: 0
isFixedBump: 0
isGnd: 0
isMixedSignal: 0
isPatternTrunk: 0
isPhysOnly: 0
isPwr: 0
isPwrOrGnd: 0
isScanNet: 0
isTrialRouted: 0
mask: 0
name: core/rst_sync/rst_sync[0]
numInputTerms: 0
numOutputTerms: 0
numTerms: 0
objType: net
preferredExtraSpace: 0
props: 0x2abc3a24d398 0x2abc3a30dd10
rule: 0x0
sVias: 0x0
sWires: 0x0
shieldNets: 0x0
siPostRouteRepair: 0
skipAntennaRepair: 0
skipRouting: 0
terms: 0x0
topPreferredLayer: 0x0
vias: 0x0
voltage: 0
weight: 2
wires: 0x0

encounter 94> dbGet $net.hNets.??
<CMD> dbGet $net.hNets.??
allTerms: 0x0
hInstTerms: 0x0
hTerms: 0x0
instTerms: 0x0
isGnd: 0
isPwrOrGnd: 0
name: core/rst_sync/rst_n_conv/a[0]
net: 0x2abc35a7abe0
objType: hNet
props: 0x0

allTerms: 0x0
hInstTerms: 0x0
hTerms: 0x0
instTerms: 0x0
isGnd: 0
isPwrOrGnd: 0
name: core/rst_sync/rst_conv/a[0]
net: 0x2abc35a7abe0
objType: hNet
props: 0x0

allTerms: 0x0
hInstTerms: 0x0
hTerms: 0x0
instTerms: 0x0
isGnd: 0
isPwrOrGnd: 0
name: core/rst_sync/rst_sync[0]
net: 0x2abc35a7abe0
objType: hNet
props: 0x0
encounter 95> dbGet $net.props.??
<CMD> dbGet $net.props.??
name: TDRCNetExpansion
objType: prop
parent: 0x2abc35a7abe0
value: 33555632
valueType: int

name: GNCNetAlias
objType: prop
parent: 0x2abc35a7abe0
value: 0x0
valueType: obj
encounter 101> deleteNet core/rst_sync/rst_sync*
<CMD> deleteNet core/rst_sync/rst_sync*
Deleting net [core/rst_sync/rst_sync[2]]
Deleting net [core/rst_sync/rst_sync[1]]
Deleting net [core/rst_sync/rst_sync[0]]
**WARN: (ENCSYC-298):   Found no net name matching wildcard "core/rst_sync/rst_sync*".
Processed 0 net(s)
encounter 102> deleteNet core/rst_sync/rst_sync*
<CMD> deleteNet core/rst_sync/rst_sync*
Deleting net [core/rst_sync/rst_sync[2]]
Deleting net [core/rst_sync/rst_sync[1]]
Deleting net [core/rst_sync/rst_sync[0]]
**WARN: (ENCSYC-298):   Found no net name matching wildcard "core/rst_sync/rst_sync*".
Processed 0 net(s)
I can't figure out how to delete these nets/hNets. deleteNet doesn't do anything. I guess I don't really mind if there are floating nets in the database, but the verification guys don't like them showing up in the output verilog. Here are the partial results of saveNetlist:
/*
###############################################################
# Generated by:      Cadence Encounter 13.10-p003_1
# OS:                Linux x86_64(Host ID mbt02.rsint.net)
# Generated on:      Wed Aug 7 15:59:07 2013
# Design:            TOP
# Command:           saveNetlist -flat -excludeLeafCell -phys temp3.v
#
###############################################################
*/
module TOP ();

   // Internal wires
   supply1 VDDIO;
   supply0 UNCONNECTED29;
   supply0 UNCONNECTED30;
   supply1 VDD;
   supply0 VEE;
   supply0 VSS;
   ...
   wire \core/rst_n_sync/rst_sync[2] ;
   wire \core/rst_n_sync/rst_sync[1] ;
   wire \core/rst_n_sync/rst_sync[0] ;
   wire \core/rst_sync/rst_sync[2] ;
   wire \core/rst_sync/rst_sync[1] ;
   wire \core/rst_sync/rst_sync[0] ;
   ...
endmodule
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AThomasL over 12 years ago

Ugh, I give up. Here is an example of a net that just won't go away:
<CMD> dbGet $net.??
allTerms: 0x0
avoidDetour: 0
bottomPreferredLayer: 0x255fa5a0
box: {2147483.647 2147483.647 -2147483.648 -2147483.648}
bus: 0x0
hNets: 0x2abc364cbdc0 0x2abc364cbd30 0x2abc364cbc10
instTerms: 0x0
isAnalog: 0
isCTSClock: 0
isClock: 0
isDontTouch: 0
isExternal: 0
isFixedBump: 0
isGnd: 0
isMixedSignal: 0
isPatternTrunk: 0
isPhysOnly: 0
isPwr: 0
isPwrOrGnd: 0
isScanNet: 0
isTrialRouted: 0
mask: 0
name: core/rst_sync/rst_sync[0]
numInputTerms: 0
numOutputTerms: 0
numTerms: 0
objType: net
preferredExtraSpace: 0
props: 0x2abc3a24d398 0x2abc3a30dd10
rule: 0x0
sVias: 0x0
sWires: 0x0
shieldNets: 0x0
siPostRouteRepair: 0
skipAntennaRepair: 0
skipRouting: 0
terms: 0x0
topPreferredLayer: 0x0
vias: 0x0
voltage: 0
weight: 2
wires: 0x0

encounter 94> dbGet $net.hNets.??
<CMD> dbGet $net.hNets.??
allTerms: 0x0
hInstTerms: 0x0
hTerms: 0x0
instTerms: 0x0
isGnd: 0
isPwrOrGnd: 0
name: core/rst_sync/rst_n_conv/a[0]
net: 0x2abc35a7abe0
objType: hNet
props: 0x0

allTerms: 0x0
hInstTerms: 0x0
hTerms: 0x0
instTerms: 0x0
isGnd: 0
isPwrOrGnd: 0
name: core/rst_sync/rst_conv/a[0]
net: 0x2abc35a7abe0
objType: hNet
props: 0x0

allTerms: 0x0
hInstTerms: 0x0
hTerms: 0x0
instTerms: 0x0
isGnd: 0
isPwrOrGnd: 0
name: core/rst_sync/rst_sync[0]
net: 0x2abc35a7abe0
objType: hNet
props: 0x0
encounter 95> dbGet $net.props.??
<CMD> dbGet $net.props.??
name: TDRCNetExpansion
objType: prop
parent: 0x2abc35a7abe0
value: 33555632
valueType: int

name: GNCNetAlias
objType: prop
parent: 0x2abc35a7abe0
value: 0x0
valueType: obj
encounter 101> deleteNet core/rst_sync/rst_sync*
<CMD> deleteNet core/rst_sync/rst_sync*
Deleting net [core/rst_sync/rst_sync[2]]
Deleting net [core/rst_sync/rst_sync[1]]
Deleting net [core/rst_sync/rst_sync[0]]
**WARN: (ENCSYC-298):   Found no net name matching wildcard "core/rst_sync/rst_sync*".
Processed 0 net(s)
encounter 102> deleteNet core/rst_sync/rst_sync*
<CMD> deleteNet core/rst_sync/rst_sync*
Deleting net [core/rst_sync/rst_sync[2]]
Deleting net [core/rst_sync/rst_sync[1]]
Deleting net [core/rst_sync/rst_sync[0]]
**WARN: (ENCSYC-298):   Found no net name matching wildcard "core/rst_sync/rst_sync*".
Processed 0 net(s)
I can't figure out how to delete these nets/hNets. deleteNet doesn't do anything. I guess I don't really mind if there are floating nets in the database, but the verification guys don't like them showing up in the output verilog. Here are the partial results of saveNetlist:
/*
###############################################################
# Generated by:      Cadence Encounter 13.10-p003_1
# OS:                Linux x86_64(Host ID mbt02.rsint.net)
# Generated on:      Wed Aug 7 15:59:07 2013
# Design:            TOP
# Command:           saveNetlist -flat -excludeLeafCell -phys temp3.v
#
###############################################################
*/
module TOP ();

   // Internal wires
   supply1 VDDIO;
   supply0 UNCONNECTED29;
   supply0 UNCONNECTED30;
   supply1 VDD;
   supply0 VEE;
   supply0 VSS;
   ...
   wire \core/rst_n_sync/rst_sync[2] ;
   wire \core/rst_n_sync/rst_sync[1] ;
   wire \core/rst_n_sync/rst_sync[0] ;
   wire \core/rst_sync/rst_sync[2] ;
   wire \core/rst_sync/rst_sync[1] ;
   wire \core/rst_sync/rst_sync[0] ;
   ...
endmodule
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