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Combinational loop reported by RTL compiler

chinmay123

This is an instance where Encounter RTL compiler is reporting an unintentional combination loop.

There are two combinational blocks A and B . The inputs to  A and B are multiplexed. The select line of both the multiplexers is same and the common select line is an output of a flip-flop.The select line toggles every clock cycle.

Say, in the first clock cycle(more generally odd cycles ) A is fed by a flop output and B is fed by the output of A. Then in the next clock cycle (even cycles) A is fed by the ouptut of B and B itself is fed from another flop ouptut . This loop is reported as a combinational loop by RTL compiler .

My questions are

     1) Is this a bug in the RTL compiler ? 

     2) Is there a hack (like setting any attributes)  which can remove this combinational loop as percieved by the RTL compiler 

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