Stats

  • Locked Locked
  • Replies 10
  • Subscribers 95
  • Views 21366
  • Members are here 0
This discussion has been locked.
You can no longer post new replies to this discussion. If you have a question you can start a new discussion

Can someone help me figure out where does power analysis of Cadence Encounter RTL Compiler comes from

Haoxiang

Hi all,

 New to this area, I have two questions that need your help. 

1st, when I get the power analysis from Cadence Encounter RTL Compiler, It automatically shows Leakage, Internal, Net and Switching Power of the generated schematic. But then I get comfused, under which input pattern does the Compiler infer all the power values, especially switching power, since it's directly related to the frequency of input?

 2nd, what's the difference between Leakage Power and Internal Power? And does Net Power means power consumed from the interconnect? I get confusion about these terms

 Thank you very much for your notice and help!

Best 

Parents
  • ajay01

    Hi ,

    1.As i mentioned,
    Dynamic power is the sum of two factors: switching power plus short-circuit power.
    Switching power is dissipated when charging or discharging internal and net
    capacitances. Short-circuit power is the power dissipated by an instantaneous shortcircuit
    connection between the supply voltage and the ground at the time the gate
    switches state.
    Pswitching = a .f.Ceff .Vdd2
    Where a = switching activity, f = switching frequency, Ceff = effective capacitance,
    Vdd = supply voltage
    Pshort-circuit = Isc .Vdd.f
    Where Isc = short-circuit current during switching, Vdd = supply voltage,
    f = switching frequency

    As we will go ahead in technology we required chip should work faster means frequency will increase.
    So as shown above equation dynamic IR drop increase.
    For that we are using Low Power Techniques and CPF flow.
    So RTL compiler set frequency based on requirement and leakage calculation and technicians which will be used during
    Physical implementation.

    2. In  standard cell library that defines as below:
    consider its a buffer.
    Then it will define leakage power when logic A and !A.
    And internal power At pin A.full table.
    Like that for all std. cell power define with different logic.

     

     

     

Reply
  • ajay01

    Hi ,

    1.As i mentioned,
    Dynamic power is the sum of two factors: switching power plus short-circuit power.
    Switching power is dissipated when charging or discharging internal and net
    capacitances. Short-circuit power is the power dissipated by an instantaneous shortcircuit
    connection between the supply voltage and the ground at the time the gate
    switches state.
    Pswitching = a .f.Ceff .Vdd2
    Where a = switching activity, f = switching frequency, Ceff = effective capacitance,
    Vdd = supply voltage
    Pshort-circuit = Isc .Vdd.f
    Where Isc = short-circuit current during switching, Vdd = supply voltage,
    f = switching frequency

    As we will go ahead in technology we required chip should work faster means frequency will increase.
    So as shown above equation dynamic IR drop increase.
    For that we are using Low Power Techniques and CPF flow.
    So RTL compiler set frequency based on requirement and leakage calculation and technicians which will be used during
    Physical implementation.

    2. In  standard cell library that defines as below:
    consider its a buffer.
    Then it will define leakage power when logic A and !A.
    And internal power At pin A.full table.
    Like that for all std. cell power define with different logic.

     

     

     

Children
No Data

Community Guidelines

The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.