I would like to adapt DEF flow with RTL compiler PLE.
Is there any user guide or manual I can reference with?
And should I get a detailed DEF from backend or I can just take a rough DEF (only information about memory, hard macro, and some high level hierarchical design)?
I am not sure what you mean by the DEF flow. If, by that, you mean a flow that reads a DEF file, then reading a DEF does not require anything beyond RC200. However, other licenses may be required if you want to enable physical features such as congestion mitigation, etc.
As per the DEF, indeed a floorplan is what is expected and recommended and not a detailed floorplan. If you have a final floorplan, all cells are fixed and hence there would not be much for the synthesis tool to do
Please review user guide